Patents by Inventor Pierre Irissou
Pierre Irissou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10819101Abstract: An over-current protection apparatus constituted of: a transistor disposed on a substrate; a first thermal sense device arranged to sense a temperature reflective of a junction temperature of the transistor; a second thermal sense device arranged to sense a temperature reflective of a temperature of a casing surrounding the substrate; and a control circuitry, arranged to alternately: responsive to the sensed temperature by the first thermal sense device and the sensed temperature of the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is greater than a predetermined value, switch off the transistor; and responsive to the sensed temperature by the first thermal sense device and the sensed temperature by the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is not greater than the predetermined value, switch on the transistor.Type: GrantFiled: January 10, 2018Date of Patent: October 27, 2020Assignee: Microsemi CorporationInventors: Pierre Irissou, Etienne Colmet-Daage
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Publication number: 20180241203Abstract: An over-current protection apparatus constituted of: a transistor disposed on a substrate; a first thermal sense device arranged to sense a temperature reflective of a junction temperature of the transistor; a second thermal sense device arranged to sense a temperature reflective of a temperature of a casing surrounding the substrate; and a control circuitry, arranged to alternately: responsive to the sensed temperature by the first thermal sense device and the sensed temperature of the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is greater than a predetermined value, switch off the transistor; and responsive to the sensed temperature by the first thermal sense device and the sensed temperature by the second thermal sense device being indicative that the temperature difference between the transistor junction and the substrate casing is not greater than the predetermined value, switch on the transistor.Type: ApplicationFiled: January 10, 2018Publication date: August 23, 2018Inventors: Pierre IRISSOU, Etienne COLMET-DAAGE
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Patent number: 8558518Abstract: Methods, systems, and devices are described for sensing a phase-cut dimming signal and outputting a control signal compatible with a switching power circuit. Embodiments of the invention generate at least one of a low-frequency pulse-wave-modulated control signal, an analog output control signal, or a digital (e.g., higher-frequency pulse-wave-modulated) output control signal. Some embodiments further provide preloading and/or startup control functionality to allow proper functioning of the circuitry under small-conduction-angle (i.e., highly dimmed) conditions.Type: GrantFiled: December 27, 2011Date of Patent: October 15, 2013Assignee: Microsemi CorporationInventors: Pierre Irissou, Etienne Colmet-Daage, Bernard Drexler
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Patent number: 8482894Abstract: A load current is limited to a safe level with a current protection logic circuit within a first selected interval after detection of a fault condition. The current protection logic circuit returns the load current to a normal level within a second selected interval after correction of the fault condition, wherein said safe level is less than one half of the normal level. The current protection logic circuit is a feature of a high side driver comprising at least two source drivers, each source driver being configured to switch an electrical load to a common power supply, and comprising a respective current protection logic circuit.Type: GrantFiled: March 21, 2011Date of Patent: July 9, 2013Assignee: Space Systems/Loral, LLCInventors: Pablito B. Yra, Pierre Irissou, Mathieu Sureau, David Truong, Russell Stevens
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Publication number: 20120242304Abstract: A load current is limited to a safe level with a current protection logic circuit within a first selected interval after detection of a fault condition. The current protection logic circuit returns the load current to a normal level within a second selected interval after correction of the fault condition, wherein said safe level is less than one half of the normal level. The current protection logic circuit is a feature of a high side driver comprising at least two source drivers, each source driver being configured to switch an electrical load to a common power supply, and comprising a respective current protection logic circuit.Type: ApplicationFiled: March 21, 2011Publication date: September 27, 2012Applicant: SPACE SYSTEMS/LORAL, INC.Inventors: Pablito B. Yra, Pierre Irissou, Mathieu Sureau, David Truong, Russell Stevens
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Patent number: 8253400Abstract: Methods, systems, and devices are described for providing output (e.g., current) sensing and feedback in high-voltage switching power converter topologies. Certain aspects of high voltage switching converter topologies may make output (e.g., current) sensing difficult. In some embodiments, a sampling module implements sample-and-hold techniques in a low-side switch converter topology to provide reliable current sensing. Embodiments of the sampling module provide certain functionality, including integration, blanking, buffering, and adjustable sampling frequency. Further, some embodiments include feedback functionality for generating a converter driver signal (for driving the switching converter) and/or a sample driver signal (for driving the sampling module) as a function of sensed output feedback from the sampling module.Type: GrantFiled: August 6, 2009Date of Patent: August 28, 2012Assignee: Microsemi CorporationInventors: Pierre Irissou, Etienne Colmet-Daage
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Patent number: 8253395Abstract: Methods, systems, and devices are provided for optimizing a bus voltage supplied to a switching power converter to keep the duty cycle of the switching power converter to within a desirable operating range. In some embodiments, the duty cycle of the switching signal used to drive the switching power converter is monitored (e.g., indirectly) to determine whether the duty cycle is approaching an undesirable level. For example, as the duty cycle decreases (e.g., approaches or crosses a certain threshold), embodiments decrease the bus voltage. This may, in turn, allow the switching power converter to output substantially the same output to the load, while using a more efficient (e.g., larger) duty cycle. Certain embodiments use similar techniques, along with certain bus voltage optimization techniques, to control a bus voltage as a function of feedback from multiple switching power converters.Type: GrantFiled: August 6, 2009Date of Patent: August 28, 2012Assignee: Microsemi CorporationInventors: Pierre Irissou, Etienne Colmet-Daage
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Publication number: 20120098505Abstract: Methods, systems, and devices are described for sensing a phase-cut dimming signal and outputting a control signal compatible with a switching power circuit. Embodiments of the invention generate at least one of a low-frequency pulse-wave-modulated control signal, an analog output control signal, or a digital (e.g., higher-frequency pulse-wave-modulated) output control signal. Some embodiments further provide preloading and/or startup control functionality to allow proper functioning of the circuitry under small-conduction-angle (i.e., highly dimmed) conditions.Type: ApplicationFiled: December 27, 2011Publication date: April 26, 2012Applicant: Microsemi CorporationInventors: Pierre IRISSOU, Etienne COLMET-DAAGE, Bernard DREXLER
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Patent number: 8102167Abstract: Methods, systems, and devices are described for sensing a phase-cut dimming signal and outputting a control signal compatible with a switching power circuit. Embodiments of the invention generate at least one of a low-frequency pulse-wave-modulated control signal, an analog output control signal, or a digital (e.g., higher-frequency pulse-wave-modulated) output control signal. Some embodiments further provide preloading and/or startup control functionality to allow proper functioning of the circuitry under small-conduction-angle (i.e., highly dimmed) conditions.Type: GrantFiled: March 16, 2009Date of Patent: January 24, 2012Assignee: Microsemi CorporationInventors: Pierre Irissou, Etienne Colmet-Daage, Bernard Drexler
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Publication number: 20100033146Abstract: Methods, systems, and devices are described for providing output (e.g., current) sensing and feedback in high-voltage switching power converter topologies. Certain aspects of high voltage switching converter topologies may make output (e.g., current) sensing difficult. In some embodiments, a sampling module implements sample-and-hold techniques in a low-side switch converter topology to provide reliable current sensing. Embodiments of the sampling module provide certain functionality, including integration, blanking, buffering, and adjustable sampling frequency. Further, some embodiments include feedback functionality for generating a converter driver signal (for driving the switching converter) and/or a sample driver signal (for driving the sampling module) as a function of sensed output feedback from the sampling module.Type: ApplicationFiled: August 6, 2009Publication date: February 11, 2010Applicant: ASIC Advantage Inc.Inventors: Pierre Irissou, Etienne Colmet-Daage
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Publication number: 20100033150Abstract: Methods, systems, and devices are provided for optimizing a bus voltage supplied to a switching power converter to keep the duty cycle of the switching power converter to within a desirable operating range. In some embodiments, the duty cycle of the switching signal used to drive the switching power converter is monitored (e.g., indirectly) to determine whether the duty cycle is approaching an undesirable level. For example, as the duty cycle decreases (e.g., approaches or crosses a certain threshold), embodiments decrease the bus voltage. This may, in turn, allow the switching power converter to output substantially the same output to the load, while using a more efficient (e.g., larger) duty cycle. Certain embodiments use similar techniques, along with certain bus voltage optimization techniques, to control a bus voltage as a function of feedback from multiple switching power converters.Type: ApplicationFiled: August 6, 2009Publication date: February 11, 2010Applicant: ASIC Advantage Inc.Inventors: Pierre Irissou, Etienne Colmet-Daage
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Publication number: 20090243582Abstract: Methods, systems, and devices are described for sensing a phase-cut dimming signal and outputting a control signal compatible with a switching power circuit. Embodiments of the invention generate at least one of a low-frequency pulse-wave-modulated control signal, an analog output control signal, or a digital (e.g., higher-frequency pulse-wave-modulated) output control signal. Some embodiments further provide preloading and/or startup control functionality to allow proper functioning of the circuitry under small-conduction-angle (i.e., highly dimmed) conditions.Type: ApplicationFiled: March 16, 2009Publication date: October 1, 2009Applicant: ASIC Advantage Inc.Inventors: Pierre Irissou, Etienne Colmet-Daage, Bernard Drexler
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Patent number: 6548878Abstract: A method is shown for producing a distributed PN photodiode having a first active region of the photodiode that can be made arbitrarily thin. A fabrication substrate is doped to have a first conductivity type in order to form the first active region of the photodiode. A layer can also be formed upon the first surface of the fabrication substrate or a first surface of a handling wafer, where the layer can be an oxide layer, where a thickness of the oxide layer can be controlled to form a dielectric refractive reflector, a reflective layer, or a conductive layer. The first surface of the handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the first active region. A plurality of second active regions of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.Type: GrantFiled: November 23, 1999Date of Patent: April 15, 2003Assignee: Integration Associates, Inc.Inventors: Jean-Luc Nauleau, Wayne T. Holcombe, Pierre Irissou
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Patent number: 6458619Abstract: A method is shown for producing a PIN photodiode having low parasitic capacitance and wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A first glass layer is formed on a first surface of a handling substrate. The first surface of the handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.Type: GrantFiled: February 16, 2000Date of Patent: October 1, 2002Assignee: Integration Associates, Inc.Inventor: Pierre Irissou
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Patent number: 6303967Abstract: A method is shown for producing a PIN photodiode using a reduced number of masks wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate. A groove is etched from the second surface of the fabrication substrate through the intrinsic region to the first surface in order to isolate the photodiode.Type: GrantFiled: October 22, 1999Date of Patent: October 16, 2001Assignee: Integration Associates, Inc.Inventor: Pierre Irissou
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Patent number: 6075275Abstract: A method is shown for producing a PIN photodiode wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. And a second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.Type: GrantFiled: February 8, 1999Date of Patent: June 13, 2000Assignee: Integration Associates, Inc.Inventor: Pierre Irissou
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Patent number: 6027956Abstract: A method is shown for producing a PIN photodiode wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. And a second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.Type: GrantFiled: February 5, 1998Date of Patent: February 22, 2000Assignee: Integration Associates, Inc.Inventor: Pierre Irissou
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Patent number: 5920451Abstract: A multi-pole circuit breaker assembly for interrupting AC power to a load upon the detection of an earth leakage fault or an overcurrent condition includes a pair of circuit breaker units mounted adjacent to an earth leakage module. The earth leakage module includes an electronic circuit that senses a current imbalance between the power line lead and the neutral line lead using a differential transformer. In response to a current imbalance greater than a predetermined value, the electronic circuit periodically energizes a switching circuit that provides power across a solenoid. The solenoid, when actuated, engages a common trip mechanism to open concurrently the contacts of the circuit breakers units. The common trip mechanism includes an elongated bar that extends through the casing of the earth leakage module and the circuit breaker units. The elongated bar engages a U-shaped trip member pivotally disposed in each circuit breaker.Type: GrantFiled: September 5, 1997Date of Patent: July 6, 1999Assignee: Carlingswitch, Inc.Inventors: Michael Fasano, David Parker, Joseph Smith, Pierre Irissou, Sergei Fedorjaczenko