Patents by Inventor Pierre Leca

Pierre Leca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10719331
    Abstract: A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: July 21, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas Froidevaux, Jean-Michel Gril-Maffre, Jean-Pierre Leca
  • Publication number: 20180329721
    Abstract: A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.
    Type: Application
    Filed: July 3, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas Froidevaux, Jean-Michel Gril-Maffre, Jean-Pierre Leca
  • Publication number: 20170147362
    Abstract: A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.
    Type: Application
    Filed: May 12, 2016
    Publication date: May 25, 2017
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas Froidevaux, Jean-Michel Gril-Maffre, Jean-Pierre Leca
  • Patent number: 7979852
    Abstract: The inventive system for automatically generating optimizes codes (19) which are operational on a predefined hardware platform (90) comprises at least one processor which is (91) based on code sources (17) provided by users and comprises means (51, 52) for receiving symbolic code sequences or standard sequences (1) representative for the processor (91) behavior in terms of performance for a predetermined application area, means (53), for receiving static parameters (2), means (55) for receiving dynamic parameters (7), an analysing device (10) for defining optimization rules (9) on the basis of performance tests and measures determined on the basis of the standard sequences (1) and the static (2) and dynamic (7) parameters, a device (80) for optimizing and generating the code receiving the standard sequences (1) and the optimization rules (9) for examining the code sources (17) of the users, detecting optimizable loops, decomposing into cores and for assembling and injecting the codes in such a way that the op
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: July 12, 2011
    Assignees: Commissariat a l'Energie Atomique et Aux Energies Alternatives, Caps Entreprise, University of Versailles Saint-Quentin-En-Yvelines
    Inventors: François Bodin, William Jalby, Xavier Le Pasteur, Christophe Lemuet, Eric Courtois, Jean Papadopoulo, Pierre Leca
  • Publication number: 20080034360
    Abstract: The inventive system for automatically generating optimises codes (19) which are operational on a predefined hardware platform (90) comprises at least one processor which is (91) based on code sources (17) provided by users and comprises means (51, 52) for receiving symbolic code sequences or standard sequences (1) representative for the processor (91) behaviour in terms of performance for a predetermined application area, means (53), for receiving static parameters (2), means (55) for receiving dynamic parameters (7), an analysing device (10) for defining optimisation rules (9) on the basis of performance tests and measures determined on the basis of the standard sequences (1) and the static (2) and dynamic (7) parameters, a device (80) for optimising and generating the code receiving the standard sequences (1) and the optimisation rules (9) for examining the code sources (17) of the users, detecting optimisable loops, decomposing into cores and for assembling and injecting the codes in such a way that the o
    Type: Application
    Filed: January 13, 2005
    Publication date: February 7, 2008
    Inventors: Francois Bodin, William Jalby, Xavier Le Pasteur, Christophe Lemuet, Eric Courtois, Jean Papadopoulo, Pierre Leca