Patents by Inventor Pierre N. Favennec

Pierre N. Favennec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4545824
    Abstract: Process for producing a semiconductor component by diffusion with prior ion implantation. According to the invention, an impurity of oxygen, fluorine, chlorine or bromine having chemical affinity with the diffusion impurity is implanted in the semiconductor substrate of GaAs or InP before thermally diffusing Zn, Cd or Fe in the substrate. The diffusion is thus limited in depth.
    Type: Grant
    Filed: November 24, 1982
    Date of Patent: October 8, 1985
    Inventors: Michel Salvi, Pierre N. Favennec, Marcel Gauneau
  • Patent number: 4137141
    Abstract: The process according to this invention makes it possible to produce a silicon nitride diffusion barrier on a semiconductor substrate, such as III-V semiconductor substrate and particularly a GaAs substrate, the produced diffusion barrier being efficient at temperatures as high as 900.degree. C during a long period.It comprises the following steps:(a) chemical deoxidation of the substrate,(b) thermal treatment at 400.degree. C,(c) 1st cathode sputtering step in a nitrogen atmosphere with a cathode made of silicon,(d) ionic etching to reduce the thickness of nitride layer produced in c),(e) 2nd cathode sputtering step similar to the first one.It is useful for III-V semiconductors having to be treated at high temperature, as for instance to be annealed after ion implantation.
    Type: Grant
    Filed: November 14, 1977
    Date of Patent: January 30, 1979
    Inventors: Loic G. Henry, Pierre N. Favennec