Abstract: A device controls access to a data memory includes secured memory areas and receiving read or read/write-access commands. The device also includes a storing unit for storing a plurality of attributes, and a reading unit for, reading an attribute corresponding to a secured memory area at which an access command is aimed. The attributes are saved in a dedicated area of the data memory, and the device comprises a synchronous attribute search circuit arranged for intercepting the access command, when an access command is sent to the data memory, reading in the data memory the attribute corresponding to the secured memory area at which the intercepted access command is aimed, then applying the access command to the data memory.

Abstract: A logic circuit comprises a logic module comprising a functional logic block supplying a functional result, and a functional flip-flop receiving the functional result and supplying a synchronous result. A module for checking the functional logic block comprises a checking logic block executing the same logic function as the functional logic block and supplying a checking result, checking synchronous flip-flops for applying data present at the input of the functional logic block to the input of the checking logic block, and means for comparing the functional result and the checking result and for supplying a first error signal.

Abstract: A cache memory includes a memory array comprising logic latches, and a circuit for reading the cache memory arranged for receiving a reference tag at input, comparing tags present in the cache memory relative to the reference tag and, if a tag is identical to the reference tag, selecting the source datum associated with the identical tag. A device for controlling access to a data memory includes a storage unit that stores a plurality of attributes defining rights of access to the data memory, the cache memory, and a synchronous attribute search circuit, for searching for an attribute in the storage unit if the attribute is not in the cache memory.

Abstract: A logic circuit comprises a logic module comprising a functional synchronous flip-flop receiving a functional result comprising several bits in parallel, and supplying a synchronous result. A module for checking the integrity of the functional flip-flop comprises a first coding block receiving the functional result and supplying a first code, a second coding block receiving the synchronous result and supplying a second code, a checking synchronous flip-flop receiving the first code and supplying a third code, and a comparator for comparing the second code with the third code and for supplying a first error signal.

Abstract: A logic circuit comprises a logic module comprising a functional logic block supplying a functional result, and a functional flip-flop receiving the functional result and supplying a synchronous result. A module for checking the functional logic block comprises a checking logic block executing the same logic function as the functional logic block and supplying a checking result, checking synchronous flip-flops for applying data present at the input of the functional logic block to the input of the checking logic block, and means for comparing the functional result and the checking result and for supplying a first error signal.

Abstract: A logic circuit comprises a logic module comprising a functional synchronous flip-flop receiving a functional result comprising several bits in parallel, and supplying a synchronous result. A module for checking the integrity of the functional flip-flop comprises a first coding block receiving the functional result and supplying a first code, a second coding block receiving the synchronous result and supplying a second code, a checking synchronous flip-flop receiving the first code and supplying a third code, and a comparator for comparing the second code with the third code and for supplying a first error signal.

Abstract: A device controls access to a data memory includes secured memory areas and receiving read or read/write-access commands. The device also includes a storing unit for storing a plurality of attributes, and a reading unit for, reading an attribute corresponding to a secured memory area at which an access command is aimed. The attributes are saved in a dedicated area of the data memory, and the device comprises a synchronous attribute search circuit arranged for intercepting the access command, when an access command is sent to the data memory, reading in the data memory the attribute corresponding to the secured memory area at which the intercepted access command is aimed, then applying the access command to the data memory.

Abstract: A cache memory includes a memory array comprising logic latches, and a circuit for reading the cache memory arranged for receiving a reference tag at input, comparing tags present in the cache memory relative to the reference tag and, if a tag is identical to the reference tag, selecting the source datum associated with the identical tag. A device for controlling access to a data memoryincludes a storage unit that stores a plurality of attributes defining rights of access to the data memory, the cache memory, and a synchronous attribute search circuit, for searching for an attribute in the storage unit if the attribute is not in the cache memory.