Patents by Inventor Pierre R. Irissou

Pierre R. Irissou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8843331
    Abstract: Methods, systems, and devices are described for providing fault monitoring for light emitting diode (LED) circuits. Embodiments receive an indication from a fault control module that a fault has occurred in a portion of an LED module (e.g., a series string of LEDs). The fault may represent an open fault or a closed fault condition. In some embodiments, a monitoring module receives the fault indication and generates a further representation that the fault has occurred (e.g., for use by external components or systems). In other embodiments, the monitoring module in configured to further indicate which in the LED module has failed, and/or in what fault condition (e.g., open or closed).
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: September 23, 2014
    Assignee: Microsemi Corporation
    Inventors: Pierre R. Irissou, Stephane Legoff, Sam Seiichiro Ochi, Etienne Colmet-Daage
  • Publication number: 20100225277
    Abstract: Methods, systems, and devices are described for described for providing control circuitry for use with battery packs. Embodiments optimize charging and discharging cycles to mitigate overcharging, over-discharging, and/or overheating individual cells in a battery pack. For example, embodiments allow for full discharging of battery packs (i.e., bringing the battery pack and its individual cells closer to their minimum voltages without going below) and full charging of battery packs (i.e., charging each cell of the battery pack closer to their maximum voltages without exceeding). Further, some embodiments include a substantially lossless, bi-directional DC-to-DC converter for facilitating ultra-fast charging of battery packs (e.g., at greater than 10C charge rates) without overheating or overcharging the individual cells of the battery packs.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 9, 2010
    Applicant: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Pierre R. Irissou, Charles Coleman
  • Publication number: 20100049454
    Abstract: Methods, systems, and devices are described for providing fault monitoring for light emitting diode (LED) circuits. Embodiments receive an indication from a fault control module that a fault has occurred in a portion of an LED module (e.g., a series string of LEDs). The fault may represent an open fault or a closed fault condition. In some embodiments, a monitoring module receives the fault indication and generates a further representation that the fault has occurred (e.g., for use by external components or systems). In other embodiments, the monitoring module in configured to further indicate which in the LED module has failed, and/or in what fault condition (e.g., open or closed).
    Type: Application
    Filed: August 21, 2009
    Publication date: February 25, 2010
    Applicant: ASIC Advanatage Inc.
    Inventors: Pierre R. Irissou, Stephane LeGoff, Sam Seiichiro Ochi, Etienne Colmet-Daage
  • Patent number: 6690078
    Abstract: A PIN photodiode and method for forming the PIN photodiode are shown where an intrinsic layer of the photodiode can be made arbitrarily thin and a second active region of the photodiode substantially shields a first active region of the photodiode. A fabrication substrate is lightly doped in order to form the intrinsic layer of the photodiode. A void is formed in a first surface of the fabrication substrate and a first active region of the photodiode having a first conductivity type is formed in the void. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A depth of the void is selected such that a portion of the first active region is exposed at the second surface of the fabrication substrate after lapping.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: February 10, 2004
    Assignee: Integration Associates, Inc.
    Inventors: Pierre R. Irissou, Brian B. North, Wayne T. Holcombe, Stephen F. Colaco
  • Patent number: 6636025
    Abstract: An integrated circuit power supply controller for use in a power supply that provides voltage regulating and current limiting functions. A current limit circuit is provided that includes a band-gap circuit for producing a reference voltage for precisely setting the current limit point, with the band-gap circuit being powered by a current sense voltage indicative of the load current rather than being powered by the regulated output voltage. Thus, the current limit circuit will operate even the power supply output is shorted. Voltage control circuitry is provided also includes a band-gap circuit for precisely controlling the magnitude of the regulated output voltage.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: October 21, 2003
    Assignee: ASIC Advantage, Inc.
    Inventor: Pierre R. Irissou
  • Patent number: 6233165
    Abstract: A power supply arrangement including a transformer and a switching element coupled to a primary winding of the transformer and a power supply. The power supply includes a capacitor having a first terminal coupled to a junction of the primary winding and the switching element and a first diode coupled between the capacitor and an output node. The power supply further includes a discharge element, such as a resistor or a diode, coupled between the junction of the first diode and the capacitor and a power supply common. A voltage regulator, such as a Zener diode, is connected to the output node to produce a regulated voltage powered by the voltage applied to the transformer primary winding, with the regulated voltage being used to power the control circuitry.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: May 15, 2001
    Assignee: ASIC Advantage, Inc.
    Inventors: Pierre R. Irissou, Hans R. Camenzind
  • Patent number: 5933304
    Abstract: A current interrupter circuit includes a primary current path and a secondary current path in parallel with one another and provided between input and output terminals. At least one solid state switch, preferably a power MOSFET, are interposed along the secondary current path. At least one electromagnetic relay has relay contacts for engaging and disengaging the primary path from a power source and from the secondary path. A sequencing circuit provides a first control signal to turn on or maintain on the solid state switches prior to sending a second control signal to open/close the relay contacts, and further provides a third control signal to turn off the solid state switches shortly after the relay contacts are opened, whereby arcing of the contacts is prevented.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: August 3, 1999
    Assignee: Carlingswitch, Inc.
    Inventor: Pierre R. Irissou
  • Patent number: 5742222
    Abstract: An economical non-metallic strain gage insensitive to ambient temperature variations, and without a diode junction, which is suitable for general use and particularly for use in touch screens, wherein the gage is adapted to be directly adhered to the screen. The gage is metallized with a thin layer of a solderable metal for electrical soldering connection to strain measurement devices and for reliable mechanical support. The gage includes an etched polysilicon material on a substrate base, such as a silicon wafer, wherein the polysilicon is doped with a dopant material such that output measurements are independent of temperature changes.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: April 21, 1998
    Assignee: AVI Systems, Inc.
    Inventors: Thomas M. Young, Pierre R. Irissou
  • Patent number: 5710519
    Abstract: A circuit arrangement automatically sets quiescent collector current conditions for a class A/B RF power transistor, which is configured of a plurality of parallel-connected transistors formed in a common semiconductor die. The biasing circuit arrangement includes a temperature-sensing transistor having its collector-emitter current flow path coupled with a programmable constant current source. A differential amplifier circuit is coupled to the base and emitter electrodes of the temperature sensing transistor, and generates a bias voltage for biasing each of the transistors of the RF power device. This bias voltage is combined with a programmable D.C. offset voltage. The values of the constant current and D.C. offset voltage are programmed such that the average of the quiescent collector currents of the parallel-connected transistors of the RF power transistor corresponds to the quiescent collector current through the temperature-sensing transistor.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: January 20, 1998
    Assignee: Spectrian
    Inventors: William H. McCalpin, Donald K. Belcher, David S. Piazza, Pierre R. Irissou
  • Patent number: 5353347
    Abstract: An amplifier for amplifying a signal received on a telephone line and for providing the amplified signal to a telephone headset. The amplifier draws current from a battery. The current drawn is reduced in the absence of activity on the line. The amplifier includes a timer that generates a first control signal after a time-out time. The timer is reset by a second control signal. A threshold circuit generates the second control signal when the signal on the telephone line is above a threshold level. Finally, a circuit, responsive to the first control signal, reduces the current drawn from the power supply. The amplifier may additionally or alternatively include receive line muting. The amplifier includes an automatic level control circuit that receives the signal received on the telephone line and controls the level of the amplified signal provided to the headset to a set level in response to a second control signal.
    Type: Grant
    Filed: February 4, 1992
    Date of Patent: October 4, 1994
    Assignee: ACS Communications, Inc.
    Inventors: Pierre R. Irissou, Shu-Ren Chen, Dwight D. Lynn, Kirk A. Reid
  • Patent number: 5291829
    Abstract: A radio frequency attenuating connector includes a secondary coil connected to a load, an electromagnetic shield enclosing the secondary coil and the load, a primary coil, a coupler for detachably coupling the primary coil and the secondary coil, an integrated circuit including a square wave oscillator producing complementary output signals, and first and second switching devices. The first switching device is responsive to one of the complementary output signals for causing a current to flow in one direction through at least a portion of the primary coil during a first half cycle of oscillation, and the second switching device is responsive to another of the complementary output signals for causing a current to flow in an opposite direction through at least a portion of the primary coil. The integrated circuit has an enable feature and includes additional protection circuitry for enhancing the safety of the radio frequency attenuating connector.
    Type: Grant
    Filed: October 29, 1992
    Date of Patent: March 8, 1994
    Assignee: Quantic Industries, Inc.
    Inventors: Mark Avory, William D. Fahey, Theodore J. Netoff, Pierre R. Irissou
  • Patent number: RE35536
    Abstract: An amplifier for amplifying a signal received on a telephone line and for providing the amplified signal to a telephone headset. The amplifier draws current from a battery. The current drawn is reduced in the absence of activity on the line. The amplifier includes a timer that generates a first control signal after a time-out time. The timer is reset by a second control signal. A threshold circuit generates the second control signal when the signal on the telephone line is above a threshold level. .[.Finally, a.]. .Iadd.A .Iaddend.circuit, responsive to the first control signal, reduces the current drawn from the power supply. The amplifier may additionally or alternatively include receive line muting. The amplifier includes an automatic level control circuit that receives the signal received on the telephone line and controls the level of the amplified signal provided to the headset to a set level in response to a second control signal. .[.Finally, a.]. .Iadd.A .Iaddend.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: June 17, 1997
    Assignee: ACS Wireless, Inc.
    Inventors: Pierre R. Irissou, Shu-Ren Chen, Dwight D. Lynn, Kirk A. Reid