Abstract: The invention relates to a symmetrical power semiconductor device having peripheral connection slabs and to a method of fabricating such a device. An essentially polycrystalline P/N epitaxial layer (23) lies flush with a main face (S1) of the device by virture of grooves (21) obtained by etching and overlaid with a peripheral P/N zone (25). A P/N layer (22) is diffused between the epitaxial layer (23) and a monocrystalline N/P layer (20) in order to establish a junction (J2) which the grooves (21) and the peripheral zone (25) serve to bring out on the main face (S1). The invention is applicable to symmetrical bipolar devices, and in particular to gate-triggered thyristors.