Abstract: Power converters are provided. A capacitor is coupled to a primary winding of a transformer forming part of an LC resonator. The capacitor is coupled with a supply voltage input (Vcc) of a controller to supply at least part of the controller with power.

Abstract: Flyback converters and corresponding methods are provided. In an implementation, an on-time of a low-side switch of the flyback converter is kept at half a resonance period of a resonance defined by a leakage inductance of a transformer of the flyback converter and a capacitance value of a capacitor coupled to a primary winding of the transformer. Other methods, controllers and flyback converters are also provided.

Abstract: A power supply system includes a first stage, a phase delay circuit, and a second stage. The first stage includes a resonant power supply circuit operable to derive an intermediate voltage from an input voltage. The phase delay circuit is coupled between the first stage and the second stage of the power supply. During operation, the phase delay circuit applies a phase delay to the intermediate voltage generated by the resonant circuit. The second stage receives and converts the phase delayed intermediate signal into an output voltage that powers a load.

Abstract: Power converters are provided. A capacitor is coupled to a primary winding of a transformer forming part of an LC resonator. The capacitor is coupled with a supply voltage input (Vcc) of a controller to supply at least part of the controller with power.

Abstract: A switched mode power supply (SMPS) to output a smoothly rising voltage (VOUT) during startup and still operate efficiently during steady state. A smoothly rising VOUT that avoids a negative voltage slope and voltage overshoot may be desirable in some applications. The techniques of this disclosure include an adaptive loading time controlled oscillator (TCO) compensation circuit that adjusts the TCO frequency to linearly regulate the feedback voltage from the half-bridge (VHBFB). The TCO compensation circuit adapts to the startup loading and self-adjusts the regulation speed for the handover point between the TCO and the voltage controlled oscillator (VCO).

Abstract: Circuits and methods are provided for voltage conversion within a variant switched-capacitor converter (SCC). The circuit topology of the variant SCC includes an adjustable converter that is interposed between a switch ladder and a rectifier of the variant SCC. The adjustable converter may be an inductor-based switching converter, e.g., a buck, boost, or buck/boost converter. The adjustable converter sets the output voltage of the variant SCC and sets a base current that flows through the adjustable converter. The overall output current is an amplified version of the base current. Because the base current is much lower than the overall output current, the adjustable converter may use a much smaller inductor than would be required by a voltage converter through which the entirety of the output current flows through an inductor.

Abstract: A switched mode power supply (SMPS) to output a smoothly rising voltage (VOUT) during startup and still operate efficiently during steady state. A smoothly rising VOUT that avoids a negative voltage slope and voltage overshoot may be desirable in some applications. The techniques of this disclosure include an adaptive loading time controlled oscillator (TCO) compensation circuit that adjusts the TCO frequency to linearly regulate the feedback voltage from the half-bridge (VHBFB). The TCO compensation circuit adapts to the startup loading and self-adjusts the regulation speed for the handover point between the TCO and the voltage controlled oscillator (VCO).

Abstract: A method includes turning off a high-side switch of an inductor-inductor-capacitor (LLC) power converter; detecting a first current pulse at a gate of a low-side switch of the LLC power converter after turning off the high-side switch; and turning on the low-side switch of the LLC power converter after detecting the first current pulse.

Abstract: Flyback converters and corresponding methods are provided. In an implementation, an on-time of a low-side switch of the flyback converter is kept at half a resonance period of a resonance defined by a leakage inductance of a transformer of the flyback converter and a capacitance value of a capacitor coupled to a primary winding of the transformer. Other methods, controllers and flyback converters are also provided.

Abstract: A method includes turning off a high-side switch of an inductor-inductor-capacitor (LLC) power converter; detecting a first current pulse at a gate of a low-side switch of the LLC power converter after turning off the high-side switch; and turning on the low-side switch of the LLC power converter after detecting the first current pulse.

Abstract: A converter circuit arrangement is provided, including a converter switch controller, a converter switch, a load circuit interface and an inductor. The converter switch controller may include a control input. The converter switch may be coupled between a first power supply potential and the control input. The inductor may be coupled between a second power supply potential and the load circuit interface. The load circuit interface may be coupled between the control input and the inductor.

Abstract: A controller for controlling a power converter includes an analog-to-digital converter (ADC) configured to output, based on a received analog voltage, a first digital value defined by a first resolution. The controller also includes a digital filter configured to adjust, based at least in part on the first digital value, a second digital value, wherein the second digital value is defined by a second resolution different from the first resolution. The controller further includes a pulse modulation device configured to output, based on a sum of the first digital value and the second digital value, a pulse modulated signal, wherein a frequency of the pulse modulated signal is defined by the second resolution.

Abstract: It is possible to achieve more precise power regulation in switched mode power supply systems by performing at least some control-loop processing on the secondary-side of the transformer. In particular, a secondary-side measurement is processed at least partially by a secondary-side controller to obtain a switching indication signal. The switching indication signal is then communicated from the secondary-side controller to a primary-side controller, where it is used to regulate the amount of energy applied to the primary winding. The switching indication signal may be any control signaling instruction that prompts the primary-side controller to regulate and/or modify the power applied to the primary winding. The switching indication signal may be communicated over an isolating signal path, such as a single-ended capacitive coupler, a differential capacitive coupler, an inductive coupler, or an opto-coupler.

Abstract: A controller for controlling a power converter includes an analog-to-digital converter (ADC) configured to output, based on a received analog voltage, a first digital value defined by a first resolution. The controller also includes a digital filter configured to adjust, based at least in part on the first digital value, a second digital value, wherein the second digital value is defined by a second resolution different from the first resolution. The controller further includes a pulse modulation device configured to output, based on a sum of the first digital value and the second digital value, a pulse modulated signal, wherein a frequency of the pulse modulated signal is defined by the second resolution.

Abstract: It is possible to achieve zero-voltage switching in continuous conductance mode (CCM) flyback converters by reducing the voltage differential across the primary winding immediately prior to transitioning the primary circuit from the off-state to the on-state. In one example, the voltage differential is reduced to the extent that polarity across the primary winding is reversed. In another example, the voltage differential across the primary winding is reduced significantly, but not to the extent that the polarity is reversed. Reducing the voltage differential across the primary winding may reduce a voltage potential across a current path of a switching transistor (e.g., a source-drain in a FET transistor) used to transition the primary circuit from the off-state to the on-state, which may decrease the parasitic power loss when the switching transistor is activated (closed).

Abstract: It is possible to achieve more precise power regulation in switched mode power supply systems by performing at least some control-loop processing on the secondary-side of the transformer. In particular, a secondary-side measurement is processed at least partially by a secondary-side controller to obtain a switching indication signal. The switching indication signal is then communicated from the secondary-side controller to a primary-side controller, where it is used to regulate the amount of energy applied to the primary winding. The switching indication signal may be any control signaling instruction that prompts the primary-side controller to regulate and/or modify the power applied to the primary winding. The switching indication signal may be communicated over an isolating signal path, such as a single-ended capacitive coupler, a differential capacitive coupler, an inductive coupler, or an opto-coupler.

Abstract: In accordance with an embodiment, a circuit includes a first transistor, a second transistor having a reference node coupled to an output node of the first transistor, and a control circuit. The control circuit is configured to couple a second reference node to a control terminal of the second transistor during a first mode of operation, couple a floating reference voltage between the control terminal of the second transistor and the reference terminal of the second transistor during a second mode of operation and during a third mode of operation, and couple a third reference node to the reference terminal of the second transistor during the third mode of operation. The second reference node is configured to have a voltage potential operable to turn-on the second transistor, and the floating reference voltage is operable to turn on the second transistor.

Abstract: It is possible to achieve zero-voltage switching in continuous conductance mode (CCM) flyback converters by reducing the voltage differential across the primary winding immediately prior to transitioning the primary circuit from the off-state to the on-state. In one example, the voltage differential is reduced to the extent that polarity across the primary winding is reversed. In another example, the voltage differential across the primary winding is reduced significantly, but not to the extent that the polarity is reversed. Reducing the voltage differential across the primary winding may reduce a voltage potential across a current path of a switching transistor (e.g., a source-drain in a FET transistor) used to transition the primary circuit from the off-state to the on-state, which may decrease the parasitic power loss when the switching transistor is activated (closed).

Abstract: In accordance with an embodiment, a circuit includes a first transistor, a second transistor having a reference node coupled to an output node of the first transistor, and a control circuit. The control circuit is configured to couple a second reference node to a control terminal of the second transistor during a first mode of operation, couple a floating reference voltage between the control terminal of the second transistor and the reference terminal of the second transistor during a second mode of operation and during a third mode of operation, and couple a third reference node to the reference terminal of the second transistor during the third mode of operation. The second reference node is configured to have a voltage potential operable to turn-on the second transistor, and the floating reference voltage is operable to turn on the second transistor.

Abstract: In accordance with an embodiment, a circuit includes a first transistor, a second transistor having a reference node coupled to an output node of the first transistor, and a control circuit. The control circuit is configured to couple a second reference node to a control terminal of the second transistor during a first mode of operation, couple a floating reference voltage between the control terminal of the second transistor and the reference terminal of the second transistor during a second mode of operation and during a third mode of operation, and couple a third reference node to the reference terminal of the second transistor during the third mode of operation. The second reference node is configured to have a voltage potential operable to turn-on the second transistor, and the floating reference voltage is operable to turn on the second transistor.