Patents by Inventor Piers J. G. Dawe

Piers J. G. Dawe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Switched optical interconnect
    Patent number: 5633961
    Abstract: An ATM switch has an ATM switch core comprising an N.times.N optical cross-connect core and a set of N port cards, each including a selector. Associated with each port card is a satellite. Wavelength shift keyed signals that are wavelength division multiplexed are employed for routing ATM cells between the satellites via the core by way of optical fibres.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: May 27, 1997
    Assignee: Northern Telecom Limited
    Inventors: Paul A. Kirkby, Piers J. G. Dawe, Ernst A. Munter
  • Semiconductor device manufacture
    Patent number: 5196368
    Abstract: A technique for achieving a substantially planar structure incorporating embedded vapor phase epitaxial growth involves the use of a window-frame shaped mask 40 of epitaxial growth resistant material to define a well in which embedded growth is to occur, and subsequently to ease mask registration problems in the location of a mask 60 employed while selectively removing unwanted material epitaxially grown on regions surrounding the well. Complementary format structures may also be formed in which epitaxial growth is provided up the sides of a mesa to substantially the same height as material grown on top of the mesa itself.
    Type: Grant
    Filed: May 8, 1991
    Date of Patent: March 23, 1993
    Assignee: Northern Telecom Limited
    Inventors: George H. B. Thompson, Piers J. G. Dawe, David A. H. Spear
  • Field effect transistor
    Patent number: 4755858
    Abstract: The gate of a gallium indium arsenide FET grown on an indium phosphide substrate comprises a top layer of GaInAsP (band gap 1.2 eV) a middle layer of GaInAs and a bottom layer of InP. This can be etched to produce an overhanging top layer which allows self-aligned gate contact metallization avoiding the registration problems of a further masking stage.
    Type: Grant
    Filed: August 22, 1984
    Date of Patent: July 5, 1988
    Assignee: ITT Gallium Arsenide Technology Center
    Inventors: George H. B. Thompson, Piers J. G. Dawe