Patents by Inventor Pieter Modderkolk

Pieter Modderkolk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT WITH TEST ARRANGEMENT, INTEGRATED CIRCUIT ARRANGEMENT AND TEXT METHOD
    Publication number: 20110018550
    Abstract: An integrated circuit (100) is disclosed comprising a test arrangement (110, 450) for testing a signal path (150) comprising a capacitive load (152), said test arrangement being arranged to, in a test mode, implement a method in accordance with the present invention by transferring a charge stored in the test arrangement (110, 450) to the capacitive load (152), and by deriving a test result from a voltage formed across the capacitive load (152) by said transferred charge.
    Type: Application
    Filed: March 19, 2009
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Franciscus Geradus Maria De Jong, Alexander Sebastian Biewenga, A. Van Der Lugt, Johannes Arnthonie Josephus Van Geloven, Pieter Modderkolk