Abstract: Systems and methods for controlling access to a vehicle or other object are provided. A vehicle-based authentication unit and mobile access device, e.g., a key fob, that wirelessly communicates with the vehicle-based authentication unit may each include environmental sensor(s) that collect respective environmental data local to the respective device/unit, e.g., GPS data, local temperature data, local barometric pressure data, etc. The mobile access device transmits an access request message (e.g., a response to a challenge from the vehicle-based authentication unit) that includes environmental data collected by the onboard sensor(s). The vehicle-based authentication unit receives the access request message and determines whether to grant access to the vehicle based on the environmental data included in the message.

Abstract: A combined power and input/output system for an electronic device includes a host system; a target system operably coupled to the host system via a combined power and I/O line; and a power boost circuit in the target system for enabling a higher voltage target device.

Abstract: A combined power and input/output system for an electronic device includes a host system; a target system operably coupled to the host system via a combined power and I/O line; and a power boost circuit in the target system for enabling a higher voltage target device.

Abstract: A combined power and input/output system for an electronic device includes a host system; a target system operably coupled to the host system via a combined power and I/O line; and a power boost circuit in the target system for enabling a higher voltage target device.

Abstract: A system includes first circuitry including first elements for operating in a low power mode; second circuitry including second elements for operating in a high-temperature mode; and one or more switching elements for selecting between the low power mode and the high temperature mode.

Abstract: An electronic device including a host system including a source; and a target system operably coupled to the host system via a combined power I/O line; wherein the target system includes a pass transistor and a switching system cooperative to allow the source to charge a power supply capacitor on the target system via the combined power I/O line in a first mode and alternately charge and discharge the power supply capacitor during a communication via the combined power I/O line in a second mode, wherein the alternately charging and discharging is in synchronization with said communication.

Abstract: Monitoring of a core logic internal voltage regulator output is performed to detect, alarm and put an integrated circuit device into a safe mode when the voltage on the core logic exceeds a safe operating voltage value. This allows putting the integrated circuit devise into a predictable, detectable and safe mode, and to alarm the over-voltage condition to a system monitor to alert on a fault and subsequent fault disposition.

Abstract: An electronic device including a host system including a source; and a target system operably coupled to the host system via a combined power I/O line; wherein the target system includes a pass transistor and a switching system cooperative to allow the source to charge a power supply capacitor on the target system via the combined power I/O line in a first mode and alternately charge and discharge the power supply capacitor during a communication via the combined power I/O line in a second mode, wherein the alternately charging and discharging is in synchronization with said communication.

Abstract: A combined power and input/output system for an electronic device includes a host system; a target system operably coupled to the host system via a combined power and I/O line; and a power boost circuit in the target system for enabling a higher voltage target device.

Abstract: A system includes first circuitry including first elements for operating in a low power mode; second circuitry including second elements for operating in a high-temperature mode; and one or more switching elements for selecting between the low power mode and the high temperature mode..

Abstract: An integrated circuit device has a digital device operating at an internal core voltage; a linear voltage regulator; and an internal switched mode voltage regulator controlled by the digital device and receiving an external supply voltage being higher than the internal core voltage through at least first and second external pins and generating the internal core voltage, wherein the internal switched mode voltage regulator is coupled with at least one external component through at least one further external pin of the plurality of external pins.

Abstract: Monitoring of a core logic internal voltage regulator output is performed to detect, alarm and put an integrated circuit device into a safe mode when the voltage on the core logic exceeds a safe operating voltage value. This allows putting the integrated circuit devise into a predictable, detectable and safe mode, and to alarm the over-voltage condition to a system monitor to alert on a fault and subsequent fault disposition.

Abstract: An integrated circuit device has a digital device operating at an internal core voltage; a linear voltage regulator; and an internal switched mode voltage regulator controlled by the digital device and receiving an external supply voltage being higher than the internal core voltage through at least first and second external pins and generating the internal core voltage, wherein the internal switched mode voltage regulator is coupled with at least one external component through at least one further external pin of the plurality of external pins.

Abstract: A successive approximation register analog-to-digital converter (SAR ADC) having a sample, hold and convert amplifier circuit may be configured for either a single channel SAR ADC or a multiple channel SAR ADC. Switches or metal connection options, e.g., bit configurable or metal mask configurable, respectively, may be used to configure a common capacitor area, a portion of which may be used as a reconfigurable charge-redistribution digital-to-analog converter (CDAC) of the SAR ADC as either a single channel sample, hold and convert 12-bit capacitor configuration or a four channel sample, hold and convert 10-bit capacitor configuration. All other parts of the SAR ADC circuitry may be substantially the same for either configuration, e.g., the resistive digital-to-analog converter (RDAC), successive approximation register (SAR), ADC controller, sample, hold and convert switches, comparator, etc, may be substantially the same for either the single or multiple channel SAR ADC configurations.

Abstract: A programmable power supply and brownout detector for electronic equipment features independent, but coordinated, control of operating voltage and brownout reference voltage. Improper programming of the operating voltage and the brownout reference voltage levels is prevented. The threshold of the programmable power supply and brownout detector can also be controlled to provide an optimum threshold over a range of operating voltages.

Abstract: A high gain input stage for a radio frequency transponder uses an amplifier for increasing a magnitude of an input signal. A DC bias circuit is used for controlling the operation of the amplifier. A resonant circuit is coupled between the amplifier and the DC bias circuit. The resonant circuit is used for receiving a signal generated by an electromagnetic field and for generating the input signal which is amplified by the amplifier. The resonant circuit has an inductor which is used to bias the amplifier thereby removing the need for a decoupling capacitor between the tuned circuit and the DC biasing of the amplifier. Multiple transponder inputs may be implemented in a single integrated circuit package.

Abstract: A successive approximation register analog-to-digital converter (SAR ADC) having a sample, hold and convert amplifier circuit may be configured for either a single channel SAR ADC or a multiple channel SAR ADC. Switches or metal connection options, e.g., bit configurable or metal mask configurable, respectively, may be used to configure a common capacitor area, a portion of which may be used as a reconfigurable charge-redistribution digital-to-analog converter (CDAC) of the SAR ADC as either a single channel sample, hold and convert 12-bit capacitor configuration or a four channel sample, hold and convert 10-bit capacitor configuration. All other parts of the SAR ADC circuitry may be substantially the same for either configuration, e.g., the resistive digital-to-analog converter (RDAC), successive approximation register (SAR), ADC controller, sample, hold and convert switches, comparator, etc, may be substantially the same for either the single or multiple channel SAR ADC configurations.

Abstract: A modulated input signal is filtered to reduce noise. The state of the input signal controls the state of a switch. Depending upon its state, the switch connects one of two circuits to a gate. The gate receives the input signal and it passes or blocks the signal depending upon the state of the signal received from the switched circuits. When it is passing the input signal, the output of the gate is equivalent to the input signal. When it is blocking the input signal, the output of the gate is set to a default state. The default state is independent of the input signal. One of the switched circuits gradually modifies the signal provided by the gate to allow the input signal to pass through. The other switched circuit gradually modifies the signal provided to the gate to block the input signal.

Abstract: A programmable power supply and brownout detector for electronic equipment features independent, but coordinated, control of operating voltage and brownout reference voltage. Improper programming of the operating voltage and the brownout reference voltage levels is prevented. The threshold of the programmable power supply and brownout detector can also be controlled to provide an optimum threshold over a range of operating voltages.

Abstract: A high gain input stage for a radio frequency transponder uses an amplifier for increasing a magnitude of an input signal. A DC bias circuit is used for controlling the operation of the amplifier. A resonant circuit is coupled between the amplifier and the DC bias circuit. The resonant circuit is used for receiving a signal generated by an electromagnetic field and for generating the input signal which is amplified by the amplifier. The resonant circuit has an inductor which is used to bias the amplifier thereby removing the need for a decoupling capacitor between the tuned circuit and the DC biasing of the amplifier. Multiple transponder inputs may be implemented in a single integrated circuit package.