Abstract: In order to convert a basic frequency by an odd integer K = 2n.+-.1, a square wave of that basic frequency is fed alternately over a noninverting and an inverting branch of a switching circuit to a pulse counter working into a decoder which emits a resetting pulse for the counter on every n.sup.th cycle. A flip-flop alternately set and reset by successive setting pulses feeds back a control signal to the switching circuit for a periodic reversal of the polarity of the incoming square wave either in the middle of the n.sup.th cycle, for K = 2n-1, or after a half-cycle delay from the end of the n.sup.th cycle, for K = 2n+1.

Abstract: To demodulate an incoming oscillation consisting of a succession of distinct signal frequencies, particularly in a data-transmission system using an alternation of two keying frequencies, the incoming oscillation is squared and then passed through a differentiator deriving a pair of closely spaced trigger pulses from any zero crossing of the incoming oscillation. The first trigger pulse causes the transfer of the contents of a buffer register, receiving the reading of a pulse counter, into a digital/analog converter whose output is compared with a reference voltage in a threshold circuit; the second trigger pulse resets the counter which receives locally generated clock pulses whose cadence is high compared to the signal frequencies.