Abstract: A non-volatile memory device integrated on semiconductor substrate and having a matrix of non-volatile memory cells organized in rows, called word lines, and columns, called bit lines, the device including a plurality of active areas formed on the semiconductor substrate equidistant from each other, and having at least a first and a second group of active areas; the non-volatile memory cells integrated in the first group of active areas, each non-volatile memory cell having a source region, a drain region, and a floating gate electrode coupled to a control gate electrode, at least one group of the memory cells sharing a common source region integrated on the semiconductor substrate; and a contact region integrated in the second group of active areas and provided with at least one common source contact of the common source region.