Patents by Inventor Pijush Kanti Ghosh

Pijush Kanti Ghosh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230369198
    Abstract: The present disclosure generally relates to a capacitor on an integrated circuit (IC) die. In an example, a package includes first and second IC dice. The first IC die includes a first circuit, a capacitor, and a polyimide layer. The first circuit is on a substrate. The capacitor includes a bottom plate over the substrate and a top plate over the bottom plate. The polyimide layer is at least partially over the top plate. A distance from a top surface of the top plate to a bottom surface of the polyimide layer is at least 30 % of a distance from a top surface of the bottom plate to a bottom surface of the top plate. A signal path, including the capacitor, is electrically coupled between the first circuit and a second circuit in the second IC die, which does not include a galvanic isolation capacitor in the signal path.
    Type: Application
    Filed: September 28, 2022
    Publication date: November 16, 2023
    Inventors: Elizabeth Stewart, Jeffrey Alan West, Byron Williams, Pijush Kanti Ghosh
  • Publication number: 20220376120
    Abstract: A capacitor is provided for high temperature systems. The capacitor includes: a substrate formed from silicon carbide material; a dielectric stack layer, including a first layer deposited on the substrate and a second layer deposited on the first layer; a Schottky contact layer deposited on the second layer; and an Ohmic contact layer deposited on the substrate. The first layer is formed with aluminum nitride (AlN) epitaxially, and the second layer is formed with aluminum oxide (Al2O3). AlN and Al2O3 are ultrawide band gap materials, and as a result, they can be use as the dielectric in the capacitor, allowing the capacitance changes to be less than 10% between ?250° C. and 600° C., which is very effective for the high temperature systems.
    Type: Application
    Filed: May 17, 2022
    Publication date: November 24, 2022
    Inventors: Xiangbo Meng, Rohith Allaparthi, Mirsaeid Sarollahi, Pijush Kanti Ghosh, Morgan Ware
  • Publication number: 20220285499
    Abstract: A microelectronic device that is radiation hardened through the incorporation of a quantum structure getter (QSG) is provided. The device, such as a field effect transistor (FET) includes a conductive channel and a material stack comprising: a capping layer, one or more barrier layers comprising a high band gap, one or more quantum structures comprising a small band gap, and a substrate. The quantum structures are positioned in close proximity to the conductive channel to form a quantum well charge getter. The getter forms a low energy area beneath the FET, which traps and confines electron-hole pair wave functions produced from ionizing radiation, causing the wave functions overlap, recombine, and produce light emission. The quantum structures getter the wave functions, which reduces the ionized photocurrent that reaches the conducting channel, thereby hardening the microelectronic device against ionizing radiation.
    Type: Application
    Filed: December 16, 2021
    Publication date: September 8, 2022
    Applicant: The United States of America, as represented by the Secretary of the Navy
    Inventors: Timothy Allen Morgan, Matthew J Gadlage, Kevin Goodman, Morgan E Ware, Pijush Kanti Ghosh