Patents by Inventor Pijush Kanti Panja

Pijush Kanti Panja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11892360
    Abstract: Circuitry generates base-to-emitter voltages (Vbe1, Vbe2) of two BJTs biased at different current densities, a base-to-emitter voltage (Vbe) of a BJT biased so Vbe is complementary to absolute temperature and has a curved non-linearity across temperature, and base-to-emitter voltages (Vbe1_c, Vbe2_c) of two BJTs biased by a temperature independent constant current and a current proportional to absolute temperature so Vbe2_c?Vbe1_c has the same but opposite curved non-linearity across temperature as Vbe. A sampling circuit samples these voltages and provides them to inputs of a loop filter. Filter outputs are quantized to produce a bitstream.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: February 6, 2024
    Assignee: STMicroelectron nternational N.V.
    Inventors: Atul Dwivedi, Pijush Kanti Panja
  • Patent number: 11867572
    Abstract: A temperature sensing circuit a switched capacitor circuit selectively samples ?Vbe and Vbe voltages and provides the sampled voltages to inputs of an integrator. A quantization circuit quantizes outputs of the integrator to produce a bitstream. When a most recent bit of the bitstream is a logic zero, operation includes sampling and integration of ?Vbe a first given number of times to produce a voltage proportional to absolute temperature. When the most recent bit of the bitstream is a logic one, operation includes cause sampling and integration of Vbe a second given number of times to produce a voltage complementary to absolute temperature. A low pass filter and decimator filters and decimates the bitstream produced by the quantization circuit to produce a signal indicative of a temperature of a chip into which the temperature sensing circuit is placed.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 9, 2024
    Assignee: STMicroelectron nternational N.V.
    Inventors: Pijush Kanti Panja, Kallol Chatterjee, Atul Dwivedi
  • Patent number: 11775001
    Abstract: A reference current generator circuit generating a reference current that is proportional to absolute temperature as a function of a difference between bias voltages of first and second transistors. A voltage generator generates an input voltage from the reference current by applying the reference current that is proportional to absolute temperature through a plurality of transistors coupled in series between the bias voltage of the second transistor and ground, with the input voltage being generated at a node between given adjacent ones of the plurality of transistors. The input voltage is complementary to absolute temperature. A differential amplifier is biased by a current derived from the reference current and generates a temperature insensitive output reference voltage from the input voltage and a voltage proportional to absolute temperature.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: October 3, 2023
    Assignee: STMicroelectronics International N.V.
    Inventors: Pijush Kanti Panja, Gautam Dey Kanungo
  • Publication number: 20220196485
    Abstract: A temperature sensing circuit a switched capacitor circuit selectively samples ?Vbe and Vbe voltages and provides the sampled voltages to inputs of an integrator. A quantization circuit quantizes outputs of the integrator to produce a bitstream. When a most recent bit of the bitstream is a logic zero, operation includes sampling and integration of ?Vbe a first given number of times to produce a voltage proportional to absolute temperature. When the most recent bit of the bitstream is a logic one, operation includes cause sampling and integration of Vbe a second given number of times to produce a voltage complementary to absolute temperature. A low pass filter and decimator filters and decimates the bitstream produced by the quantization circuit to produce a signal indicative of a temperature of a chip into which the temperature sensing circuit is placed.
    Type: Application
    Filed: November 8, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Pijush Kanti PANJA, Kallol CHATTERJEE, Atul DWIVEDI
  • Publication number: 20210405677
    Abstract: A reference current generator circuit generating a reference current that is proportional to absolute temperature as a function of a difference between bias voltages of first and second transistors. A voltage generator generates an input voltage from the reference current by applying the reference current that is proportional to absolute temperature through a plurality of transistors coupled in series between the bias voltage of the second transistor and ground, with the input voltage being generated at a node between given adjacent ones of the plurality of transistors. The input voltage is complementary to absolute temperature. A differential amplifier is biased by a current derived from the reference current and generates a temperature insensitive output reference voltage from the input voltage and a voltage proportional to absolute temperature.
    Type: Application
    Filed: September 7, 2021
    Publication date: December 30, 2021
    Applicant: STMicroelectronics International N.V.
    Inventors: Pijush Kanti PANJA, Gautam Dey KANUNGO
  • Patent number: 11137788
    Abstract: A sub-bandgap reference voltage generator includes a reference current generator generating a reference current (proportional to absolute temperature), a voltage generator generating an input voltage (proportional to absolute temperature) from the reference current, and a differential amplifier. The differential amplifier is biased by the reference current and has an input receiving the input voltage and a resistor generating a voltage proportional to absolute temperature summed with the input voltage to produce a temperature insensitive output reference voltage. The reference current generator may generate the reference current as a function of a difference between bias voltages of first and second transistors.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: October 5, 2021
    Assignee: STMicroelectronics International N.V.
    Inventors: Pijush Kanti Panja, Gautam Dey Kanungo
  • Publication number: 20210239540
    Abstract: Circuitry generates base-to-emitter voltages (Vbe1, Vbe2) of two BJTs biased at different current densities, a base-to-emitter voltage (Vbe) of a BJT biased so Vbe is complementary to absolute temperature and has a curved non-linearity across temperature, and base-to-emitter voltages (Vbe1_c, Vbe2_c) of two BJTs biased by a temperature independent constant current and a current proportional to absolute temperature so Vbe2_c?Vbe1_c has the same but opposite curved non-linearity across temperature as Vbe. A sampling circuit samples these voltages and provides them to inputs of a loop filter. Filter outputs are quantized to produce a bitstream.
    Type: Application
    Filed: December 29, 2020
    Publication date: August 5, 2021
    Applicant: STMicroelectronics International N.V.
    Inventors: Atul DWIVEDI, Pijush Kanti PANJA
  • Publication number: 20200073430
    Abstract: A sub-bandgap reference voltage generator includes a reference current generator generating a reference current (proportional to absolute temperature), a voltage generator generating an input voltage (proportional to absolute temperature) from the reference current, and a differential amplifier. The differential amplifier is biased by the reference current and has an input receiving the input voltage and a resistor generating a voltage proportional to absolute temperature summed with the input voltage to produce a temperature insensitive output reference voltage. The reference current generator may generate the reference current as a function of a difference between bias voltages of first and second transistors.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 5, 2020
    Applicant: STMicroelectronics International N.V.
    Inventors: Pijush Kanti PANJA, Gautam Dey KANUNGO
  • Patent number: 9432015
    Abstract: A first signal received at a first transistor is compared to a second signal received at a second transistor taking into account a hysteresis value to generate a comparison output. At least one of the first and second transistors has a floating bulk. A switching circuit selectively applies first and second bulk bias voltages to the floating bulk of the first or second transistor in dependence on the comparison output. A third and fourth input signals, setting the hysteresis value, are received at third and fourth transistors and compared to generate differential outputs. At least one of the third and fourth transistors has a floating bulk. A differential amplifier determines a difference between the differential outputs for application to the floating bulk of the at least one of the third and fourth transistor and further for use as one of the first and second bulk bias voltages.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: August 30, 2016
    Assignee: STMicroelectronics International N.V.
    Inventors: Pijush Kanti Panja, Rajesh Yadav
  • Publication number: 20150200632
    Abstract: A first signal received at a first transistor is compared to a second signal received at a second transistor taking into account a hysteresis value to generate a comparison output. At least one of the first and second transistors has a floating bulk. A switching circuit selectively applies first and second bulk bias voltages to the floating bulk of the first or second transistor in dependence on the comparison output. A third and fourth input signals, setting the hysteresis value, are received at third and fourth transistors and compared to generate differential outputs. At least one of the third and fourth transistors has a floating bulk. A differential amplifier determines a difference between the differential outputs for application to the floating bulk of the at least one of the third and fourth transistor and further for use as one of the first and second bulk bias voltages.
    Type: Application
    Filed: January 13, 2014
    Publication date: July 16, 2015
    Applicant: STMicroelectronics International N.V.
    Inventors: Pijush Kanti Panja, Rajesh Yadav