Patents by Inventor Pil Ho LEE

Pil Ho LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147794
    Abstract: A light emitting display device includes a first display area; and a second display area disposed adjacent to the first display area, wherein the second display area includes a pixel driving part, a main light-emitting element directly connected to the pixel driving part, and an additional light-emitting element connected to the main light-emitting element, the additional light-emitting element overlaps a peripheral driving part in a plan view, the peripheral driving part generates a signal provided to the pixel driving part, the main light-emitting element and the additional light-emitting element each include a first electrode, an emission layer, and a second electrode, the pixel driving part is electrically connected to the second electrode of the main light-emitting element and the second electrode of the additional light-emitting element, and the second electrode of the additional light-emitting element and the second electrode of the main light-emitting element are separated by a separator.
    Type: Application
    Filed: October 17, 2023
    Publication date: May 2, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Yoo Min KO, Sung Jin HONG, Ju Chan PARK, Sun Ho KIM, Hye Won KIM, Pil Suk LEE, Chung Sock CHOI
  • Publication number: 20240147775
    Abstract: A light emitting display device includes a first display area; and a second display area disposed on an external side of the first display area, wherein the second display area includes a pixel driver, a main light emitting diode electrically connected to the pixel driver, and an additional light emitting diode electrically connected to the main light emitting diode, the additional light emitting diode overlaps a peripheral driver that generates signals provided to the pixel driver, the main light emitting diode and the additional light emitting diode each include a first electrode, an emission layer, and a second electrode, and the second electrode of the main light emitting diode is electrically connected to the first electrode of the additional light emitting diode.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 2, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Chung Sock CHOI, Sun Ho KIM, Yoo Min KO, Hye Won KIM, Ju Chan PARK, Pil Suk LEE, Sung Jin HONG
  • Publication number: 20240099072
    Abstract: Disclosed are a display device and a method for manufacturing the same. The display device according to an embodiment includes a transistor that is disposed on a substrate, a first electrode that is disposed on the substrate, a pixel defining layer that is disposed on the first electrode, a separator pattern that is disposed on the pixel defining layer, auxiliary wiring that is disposed between the pixel defining layer and the separator pattern, a second electrode that is disposed on the first electrode, the pixel defining layer, and the separator pattern, connection wiring that connects the transistor to the second electrode, and an intermediate layer that is disposed between the first electrode and the second electrode. A portion of the second electrode disposed on the separator pattern and a portion of the second electrode disposed around the separator pattern are separated from each other.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Sung Jin HONG, Sun Ho KIM, Yoo Min KO, Hye Won KIM, Ju Chan PARK, Pil Suk LEE, Chung Sock CHOI
  • Publication number: 20240099075
    Abstract: A display device includes: a substrate; a transistor disposed on the substrate; a first electrode disposed on the substrate; a pixel definition layer disposed on the first electrode; a separator pattern layer disposed on the pixel definition layer; a second electrode disposed on the first electrode, the pixel definition layer, and the separator pattern layer; a connection layer connected between the transistor and the second electrode; an emission layer disposed between the first electrode and the second electrode; a conductive pattern layer; and a capping member covering a side end portion of the conductive pattern layer, wherein the conductive pattern layer and the connection layer are disposed on a same layer, and a part of the second electrode disposed on the separator pattern layer and a part of the second electrode disposed around the separator pattern layer are separated from each other.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Pil Suk LEE, Yoo Min KO, Sun Ho KIM, Hye Won KIM, Ju Chan PARK, Chung Sock CHOI, Sung Jin HONG
  • Patent number: 11923216
    Abstract: An apparatus and method for treating a substrate are provided. The apparatus includes at least one first process chamber configured to supply a developer onto the substrate; at least one second process chamber configured to treat the substrate using a supercritical fluid; a transfer chamber configured to transfer the substrate from the at least one first process chamber to the at least one second process chamber, while the developer supplied in the at least one first process chamber remains on the substrate; and a temperature and humidity control system configured to manage temperature and humidity of the transfer chamber by supplying a first gas of constant temperature and humidity into the transfer chamber.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: March 5, 2024
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SEMES CO., LTD.
    Inventors: Seung Min Shin, Sang Jin Park, Hae Won Choi, Jang Jin Lee, Ji Hwan Park, Kun Tack Lee, Koriakin Anton, Joon Ho Won, Jin Yeong Sung, Pil Kyun Heo
  • Publication number: 20220305725
    Abstract: In a three-dimensional printing method using a three-dimensional printer, a powder material is integrated on a partial area of a bed of the printer. A laser is irradiated to the integrated powder material based on a two-dimensional shape information of a manufactured structure, to sinter a two-dimensional structure and a first wall layer. The integrating and the irradiating are repeated, to form a three-dimensional structure and the first wall layer. The first wall layer is disposed to divide the partial area of the bed into a remaining area of the bed except for the partial area of the bed.
    Type: Application
    Filed: July 30, 2020
    Publication date: September 29, 2022
    Inventors: Changwoo LEE, Taeho HA, Segon HEO, Hyeonseop SHIN, Pil-Ho LEE
  • Patent number: 10355684
    Abstract: A calculation code generation circuit performs calibration using a counter, and a digital correction circuit including the same. The calculation code generation circuit performs a calculation process according to first and second modes, the calculation process including generating a first code by sampling a first value of the count code, generating a second code by sampling a second value of the count code, generating first and second calculation codes using the first and second codes in the first and second modes, respectively, and generating, in a calibration disable state, a third calculation code using the first and second calculation codes generated in the first and second modes, respectively, to remove the influence of the comparison offset or comparison performance of a comparator, thereby removing a calibration error.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: July 16, 2019
    Assignees: SK HYNIX INC, KUMOH NATIONAL INSTITUTE OF TECHNOLOGY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Young Chan Jang, Pil Ho Lee, Kwang Hun Lee, Hyun Bae Lee
  • Publication number: 20180183420
    Abstract: A calculation code generation circuit performs calibration using a counter, and a digital correction circuit including the same. The calculation code generation circuit performs a calculation process according to first and second modes, the calculation process including generating a first code by sampling a first value of the count code, generating a second code by sampling a second value of the count code, generating first and second calculation codes using the first and second codes in the first and second modes, respectively, and generating, in a calibration disable state, a third calculation code using the first and second calculation codes generated in the first and second modes, respectively, to remove the influence of the comparison offset or comparison performance of a comparator, thereby removing a calibration error.
    Type: Application
    Filed: July 21, 2017
    Publication date: June 28, 2018
    Inventors: Young Chan JANG, Pil Ho LEE, Kwang Hun LEE, Hyun Bae LEE