Patents by Inventor Pimpa Boonyatee

Pimpa Boonyatee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190252256
    Abstract: A method of singulating no-lead semiconductor devices assembled on a lead frame array, includes performing first and second laser scribing operations first and second sides of saw streets of the lead frame array, and then cutting between the first and second scribe lines, formed by the scribing operations, with a saw. The finished devices include a notch, formed by the scribing operations, at exposed portions of the device leads. Scribing the saw streets before cutting prevents smearing of the leads and the formation of burrs on the leads.
    Type: Application
    Filed: February 14, 2018
    Publication date: August 15, 2019
    Inventors: Pimpa Boonyatee, Ekapong Tangpattanasaeree, Pitak Seantumpol
  • Patent number: 10249556
    Abstract: A lead frame strip includes an array of lead frames. The lead frames each include a die pad and lead fingers that are spaced from the die pads and disposed along one or more sides of the die pads. The lead fingers have proximal ends near to the die pad and distal ends farther from the die pad. Connection bars extend between the lead frames. The lead fingers of adjacent lead frames extend from opposing sides of the connection bars. The connection bars have first portions where the lead fingers are connected thereto, and second portions between adjacent lead finger connections to the connection bar. The second portions are etched to form a bar that extends diagonally from a first one of the adjacent lead fingers connected thereto to a second one of the adjacent lead fingers connected thereto.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: April 2, 2019
    Assignee: NXP B.V.
    Inventors: Verapath Vareesantichai, Amornthep Saiyajitara, Pimpa Boonyatee, Adrianus Buijsman
  • Patent number: 9812339
    Abstract: A method of packaging a semiconductor die includes the steps of mounting the semiconductor die on a carrier, electrically connecting electrical contact pads of the semiconductor die to external electrical contacts, and encapsulating the die with a mold compound to form a packaged die. The packaged die is then thinned by using a dicing saw blade to trim the mold compound off of the top, non-active side of the package using a series of vertical cuts. This thinning step can be performed at the same time as a normal dicing step so no additional equipment or process steps are needed. Further, packages of varying thicknesses can be assembled simultaneously.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: November 7, 2017
    Assignee: NXP B.V.
    Inventors: Pimpa Boonyatee, Pitak Seantumpol, Paradee Jitrungruang