Abstract: A method for fabricating a MOS transistor is disclosed. First, a semiconductor substrate having a gate thereon is provided. A spacer is then formed on the sidewall of the gate, and two recesses are formed adjacent to the spacer and within the semiconductor substrate. Next, the spacer is thinned, and epitaxial layer is grown in each of the two recesses. By thinning the spacer before the epitaxial layer is formed, the present invention could stop the epitaxial layer to grow against the sidewall of the spacer, thereby preventing problem such as Ion degradation.

Abstract: A method for fabricating a MOS transistor is disclosed. First, a semiconductor substrate having a gate thereon is provided. A spacer is then formed on the sidewall of the gate, and two recesses are formed adjacent to the spacer and within the semiconductor substrate. Next, the spacer is thinned, and epitaxial layer is grown in each of the two recesses. By thinning the spacer before the epitaxial layer is formed, the present invention could stop the epitaxial layer to grow against the sidewall of the spacer, thereby preventing problem such as Ion degradation.

Abstract: A method for fabricating a MOS transistor is disclosed. First, a semiconductor substrate having a gate thereon is provided. A spacer is then formed on the sidewall of the gate, and two recesses are formed adjacent to the spacer and within the semiconductor substrate. Next, the spacer is thinned, and epitaxial layer is grown in each of the two recesses. By thinning the spacer before the epitaxial layer is formed, the present invention could stop the epitaxial layer to grow against the sidewall of the spacer, thereby preventing problem such as Ion degradation.

Abstract: A method for selective formation of trenches is disclosed. First, a substrate is provided. The substrate includes a first semiconductor element and a second semiconductor element. The first semiconductor element has a dopant. Second, a wet etching procedure is carried out to selectively form a pair of trenches in the substrate around the second semiconductor element, a first source/drain ion implantation is selectively carried out on the first semiconductor element, or a second source/drain ion implantation is selectively carried out on the second semiconductor element.

Abstract: A method for selective formation of trenches is disclosed. First, a substrate is provided. The substrate includes a first semiconductor element and a second semiconductor element. The first semiconductor element has a dopant. Second, a wet etching procedure is carried out to selectively form a pair of trenches in the substrate around the second semiconductor element, a first source/drain ion implantation is selectively carried out on the first semiconductor element, or a second source/drain ion implantation is selectively carried out on the second semiconductor element.

Abstract: A method for fabricating a MOS transistor is disclosed. First, a semiconductor substrate having a gate thereon is provided. A spacer is then formed on the sidewall of the gate, and two recesses are formed adjacent to the spacer and within the semiconductor substrate. Next, the spacer is thinned, and epitaxial layer is grown in each of the two recesses. By thinning the spacer before the epitaxial layer is formed, the present invention could stop the epitaxial layer to grow against the sidewall of the spacer, thereby preventing problem such as Ion degradation.

Abstract: A semiconductor device including a gate structure, two doped regions, and two buffer layers is provided. The gate structure is disposed on a substrate. The two doped regions are made of boron doped silicon germanium (SiGeB) and are disposed in the substrate at both sides of the gate structure. The two buffer layers are made of carbon doped silicon germanium (SiGeC) and are respectively disposed between the two doped regions and the substrate.