Patents by Inventor Pin-Chuan SU
Pin-Chuan SU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230364734Abstract: An embodiment is a polishing pad including a top pad and a sub pad that is below and contacting the top pad. The top pad includes top grooves along a top surface and microchannels extending from the top grooves to a bottom surface of the top pad. The sub pad includes sub grooves along a top surface of the sub pad.Type: ApplicationFiled: July 26, 2023Publication date: November 16, 2023Inventors: Pin-Chuan Su, Jeng-Chi Lin, Guan-Yi Lee, Hui-Chi Huang, Kei-Wei Chen
-
Patent number: 11664213Abstract: A tool and methods of removing films from bevel regions of wafers are disclosed. The bevel film removal tool includes an inner motor nested within an outer motor and a bevel brush secured to the outer motor. The bevel brush is adjustable radially outward to allow the wafer to be inserted in the bevel brush and to be secured to the inner motor. The bevel brush is adjustable radially inward to engage one or more sections of the bevel brush and to bring the bevel brush in contact with a bevel region of the wafer. Once engaged, a solution may be dispensed at the engaged sections of the bevel brush and the inner motor and the outer motor may be rotated such that the bevel brush is rotated against the wafer such that the bevel films of the wafer are both chemically and mechanically removed.Type: GrantFiled: December 26, 2019Date of Patent: May 30, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hui-Chi Huang, Jeng-Chi Lin, Pin-Chuan Su, Chien-Ming Wang, Kei-Wei Chen
-
Publication number: 20220367200Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.Type: ApplicationFiled: June 20, 2022Publication date: November 17, 2022Inventors: Che-Lun Chang, Pin-Chuan Su, Hsin-Chieh Huang, Ming-Yuan Wu, Tzu kai Lin, Yu-Wen Wang, Che-Yuan Hsu
-
Publication number: 20220359191Abstract: A tool and methods of removing films from bevel regions of wafers are disclosed. The bevel film removal tool includes an inner motor nested within an outer motor and a bevel brush secured to the outer motor. The bevel brush is adjustable radially outward to allow the wafer to be inserted in the bevel brush and to be secured to the inner motor. The bevel brush is adjustable radially inward to engage one or more sections of the bevel brush and to bring the bevel brush in contact with a bevel region of the wafer. Once engaged, a solution may be dispensed at the engaged sections of the bevel brush and the inner motor and the outer motor may be rotated such that the bevel brush is rotated against the wafer such that the bevel films of the wafer are both chemically and mechanically removed.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Inventors: Hui-Chi Huang, Jeng-Chi Lin, Pin-Chuan Su, Chien-Ming Wang, Kei-Wei Chen
-
Patent number: 11387109Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.Type: GrantFiled: March 5, 2021Date of Patent: July 12, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Lun Chang, Pin-Chuan Su, Hsin-Chieh Huang, Ming-Yuan Wu, Tzu kai Lin, Yu-Wen Wang, Che-Yuan Hsu, deseased
-
Publication number: 20210202239Abstract: A tool and methods of removing films from bevel regions of wafers are disclosed. The bevel film removal tool includes an inner motor nested within an outer motor and a bevel brush secured to the outer motor. The bevel brush is adjustable radially outward to allow the wafer to be inserted in the bevel brush and to be secured to the inner motor. The bevel brush is adjustable radially inward to engage one or more sections of the bevel brush and to bring the bevel brush in contact with a bevel region of the wafer. Once engaged, a solution may be dispensed at the engaged sections of the bevel brush and the inner motor and the outer motor may be rotated such that the bevel brush is rotated against the wafer such that the bevel films of the wafer are both chemically and mechanically removed.Type: ApplicationFiled: December 26, 2019Publication date: July 1, 2021Inventors: Hui-Chi Huang, Jeng-Chi Lin, Pin-Chuan Su, Chien-Ming Wang, Kei-Wei Chen
-
Patent number: 11031391Abstract: A method includes following steps. A semiconductor substrate is etched to form semiconductor fins. A dielectric material is deposited into a trench between the semiconductor fins. The semiconductor fins are etched such that top ends of the semiconductor fins are lower than a top surface of the dielectric material. After etching the semiconductor fins, epitaxially growing epitaxial fins on the semiconductor fins, respectively. A chemical mechanical polish (CMP) process is performed on the epitaxial fins, followed by cleaning the epitaxial fins using a non-contact-type cleaning device. The dielectric material is then such that the top surface of the dielectric material is lower than top ends of the epitaxial fins. A gate structure is formed across the epitaxial fins.Type: GrantFiled: October 1, 2019Date of Patent: June 8, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shen-Nan Lee, Kuo-Yin Lin, Pin-Chuan Su, Teng-Chun Tsai
-
Publication number: 20210053179Abstract: An embodiment is a polishing pad including a top pad and a sub pad that is below and contacting the top pad. The top pad includes top grooves along a top surface and microchannels extending from the top grooves to a bottom surface of the top pad. The sub pad includes sub grooves along a top surface of the sub pad.Type: ApplicationFiled: August 23, 2019Publication date: February 25, 2021Inventors: Pin-Chuan Su, Jeng-Chi Lin, Guan-Yi Lee, Hui-Chi Huang, Kei-Wei Chen
-
Publication number: 20200035677Abstract: A method includes following steps. A semiconductor substrate is etched to form semiconductor fins. A dielectric material is deposited into a trench between the semiconductor fins. The semiconductor fins are etched such that top ends of the semiconductor fins are lower than a top surface of the dielectric material. After etching the semiconductor fins, epitaxially growing epitaxial fins on the semiconductor fins, respectively. A chemical mechanical polish (CMP) process is performed on the epitaxial fins, followed by cleaning the epitaxial fins using a non-contact-type cleaning device. The dielectric material is then such that the top surface of the dielectric material is lower than top ends of the epitaxial fins. A gate structure is formed across the epitaxial fins.Type: ApplicationFiled: October 1, 2019Publication date: January 30, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shen-Nan LEE, Kuo-Yin LIN, Pin-Chuan SU, Teng-Chun TSAI
-
Patent number: 10461080Abstract: A method for manufacturing a semiconductor device is provided. In the method for manufacturing a semiconductor device, at first, a semiconductor substrate of a wafer is etched to form at least one fin. Then, an insulation structure is formed around the fin. Thereafter, the fin is recessed. Then, an epitaxial channel structure is epitaxially grown over the recessed fin. Thereafter, a portion of the epitaxial channel structure over a top surface of the insulation structure is removed. Then, a non-contact-type cleaning operation is performed to clean a top surface of the wafer after removing said portion of the epitaxial channel structure. Thereafter, the top surface of the wafer is cleaned using hydrogen fluoride after removing said portion of the epitaxial channel structure. Then, the insulation structure is recessed, such that the epitaxial channel structure protrudes from the recessed insulation structure.Type: GrantFiled: August 3, 2018Date of Patent: October 29, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shen-Nan Lee, Kuo-Yin Lin, Pin-Chuan Su, Teng-Chun Tsai
-
Publication number: 20190164963Abstract: A method for manufacturing a semiconductor device is provided. In the method for manufacturing a semiconductor device, at first, a semiconductor substrate of a wafer is etched to form at least one fin. Then, an insulation structure is formed around the fin. Thereafter, the fin is recessed. Then, an epitaxial channel structure is epitaxially grown over the recessed fin. Thereafter, a portion of the epitaxial channel structure over a top surface of the insulation structure is removed. Then, a non-contact-type cleaning operation is performed to clean a top surface of the wafer after removing said portion of the epitaxial channel structure. Thereafter, the top surface of the wafer is cleaned using hydrogen fluoride after removing said portion of the epitaxial channel structure. Then, the insulation structure is recessed, such that the epitaxial channel structure protrudes from the recessed insulation structure.Type: ApplicationFiled: August 3, 2018Publication date: May 30, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shen-Nan LEE, Kuo-Yin LIN, Pin-Chuan SU, Teng-Chun TSAI
-
Patent number: 9810640Abstract: A panel inspection apparatus is provided. The panel inspection apparatus has a support platform, a delivery platform and a panel inspection assembly. The delivery platform is disposed on the support platform, and the delivery platform has a push module for delivering the panel. The panel inspection assembly includes a plurality of light source modules and a plurality of image-taking modules corresponding to the light source modules. The light source modules include a front light source, a first horizontal light source, and a back light source. The image-taking modules include a front light image-taking module, a first horizontal light image-taking module, and a back light image-taking module. The push module delivers the panel across the support platform so that a plurality of light beams emitted from the light source modules can scan the panel to finish the panel inspection process.Type: GrantFiled: January 26, 2016Date of Patent: November 7, 2017Assignee: CHENG MEI INSTRUMENT TECHNOLOGY CO., LTD.Inventors: Chao-Yi Yeh, Pin-Chuan Su, Shang-Iun Yang, Chih Yuan Liu
-
Patent number: 9812358Abstract: FinFET structures and methods of forming the same are disclosed. In a method, a recess is formed exposing a plurality of semiconductor fins on a wafer. A dummy contact material is formed in the recess. The dummy contact material contains carbon. The dummy contact material is cured with one or more baking steps. The one or more baking steps harden the dummy contact material. A first portion of the dummy contact material is replaced with an inter-layer dielectric. A second portion of the dummy contact material is replaced with a plurality of contacts. The plurality of contacts are electrically coupled to source/drain regions of the plurality of semiconductor fins.Type: GrantFiled: September 14, 2016Date of Patent: November 7, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chun Huang, Ting-Ting Chen, Yu-Chung Su, Ling-Fu Nieh, Pin-Chuan Su, Teng-Chun Tsai, Tai-Chun Huang, Joy Cheng
-
Publication number: 20160216214Abstract: A panel inspection apparatus is provided. The panel inspection apparatus has a support platform, a delivery platform and a panel inspection assembly. The delivery platform is disposed on the support platform, and the delivery platform has a push module for delivering the panel. The panel inspection assembly includes a plurality of light source modules and a plurality of image-taking modules corresponding to the light source modules. The light source modules include a front light source, a first horizontal light source, and a back light source. The image-taking modules include a front light image-taking module, a first horizontal light image-taking module, and a back light image-taking module. The push module delivers the panel across the support platform so that a plurality of light beams emitted from the light source modules can scan the panel to finish the panel inspection process.Type: ApplicationFiled: January 26, 2016Publication date: July 28, 2016Inventors: Chao-Yi YEH, Pin-Chuan SU, Shang-Iun YANG, Chih Yuan LIU