Patents by Inventor Pin-Ting Wang

Pin-Ting Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6413885
    Abstract: A method for fabricating and patterning semiconductor devices with a resolution down to 0.12 &mgr;m on a substrate structure. The method begins by providing a substrate structure comprising various layers of oxide and/or nitride formed over either monocrystalline silicon or polycrystalline silicon. A silicon oxynitride layer is formed on the substrate structure. Key characteristics of the oxynitride layer include: a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms. A photoresist layer is formed over the silicon oxynitride layer and exposed at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm 250 nm, the silicon oxynitride layer provides a phase-cancel effect.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: July 2, 2002
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Liang-Gi Yao, Pin-Ting Wang
  • Patent number: 6372642
    Abstract: A method for fabricating and patterning semiconductor devices with a resolution down to 0.12 &mgr;m on a substrate structure. The method begins by providing a substrate structure comprising various layers of oxide and/or nitride formed over either monocrystalline silicon or polycrystalline silicon. A silicon oxynitride layer is formed on the substrate structure. Key characteristics of the oxynitride layer include: a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms. A photoresist layer is formed over the silicon oxynitride layer and exposed at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm 250 nm, the silicon oxynitride layer provides a phase-cancel effect.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: April 16, 2002
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Liang-Gi Yao, Pin-Ting Wang
  • Publication number: 20010027021
    Abstract: A method for fabricating and patterning semiconductor devices with a resolution down to 0.12 &mgr;m on a substrate structure. The method begins by providing a substrate structure comprising various layers of oxide and/or nitride formed over either monocrystalline silicon or polycrystalline silicon. A silicon oxynitride layer is formed on the substrate structure. Key characteristics of the oxynitride layer include: a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms. A photoresist layer is formed over the silicon oxynitride layer and exposed at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm 250 nm, the silicon oxynitride layer provides a phase-cancel effect.
    Type: Application
    Filed: May 29, 2001
    Publication date: October 4, 2001
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Liang-Gi Yao, Pin-Ting Wang
  • Publication number: 20010024875
    Abstract: A method for fabricating and patterning semiconductor devices with a resolution down to 0.12 &mgr;m on a substrate structure. The method begins by providing a substrate structure comprising various layers of oxide and/or nitride formed over either monocrystalline silicon or polycrystalline silicon. A silicon oxynitride layer is formed on the substrate structure. Key characteristics of the oxynitride layer include: a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms. A photoresist layer is formed over the silicon oxynitride layer and exposed at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm 250 nm, the silicon oxynitride layer provides a phase-cancel effect.
    Type: Application
    Filed: May 30, 2001
    Publication date: September 27, 2001
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Liang-Gi Yao, Pin-Ting Wang
  • Patent number: 6258734
    Abstract: A method for fabricating and patterning semiconductor devices with a resolution down to 0.12 &mgr;m on a substrate structure. The method begins by providing a substrate structure comprising various layers of oxide and/or nitride formed over either monocrystalline silicon or polycrystalline silicon. A silicon oxynitride layer is formed on the substrate structure. Key characteristics of the oxynitride layer include: a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms. A photoresist layer is formed over the silicon oxynitride layer and exposed at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm 250 nm, the silicon oxynitride layer provides a phase-cancel effect.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: July 10, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Liang-Gi Yao, Pin-Ting Wang
  • Patent number: 6077756
    Abstract: Novel overlay targets and an algorithm metrology are provided that minimize the overlay measurement error for fabricating integrated circuits. The method is particularly useful for accurately measuring layer-to-layer overlay on a substrate having material layers, such insulating, polysilicon, and metal layers that have asymmetric profiles over the overlay targets resulting from asymmetric deposition or chemical/mechanically polishing. The novel method involves forming a triangular-shaped first overlay target in a first material layer on a substrate. A second material layer, having the asymmetric profile is formed over the first material layer. During patterning of the second material layer, smaller triangular-shaped second overlay target are etched. The vertices of the smaller second overlay targets are aligned to the midpoints of the sides of the first overlay target, which are less sensitive to the asymmetries in the second material layer.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: June 20, 2000
    Assignee: Vanguard International Semiconductor
    Inventors: Hua-Tai Lin, Gwo-Yuh Shiau, Pin-Ting Wang
  • Patent number: 5982044
    Abstract: Novel triangular alignment marks and a novel algorithm are used to provide improved global alignment of the substrate on a substrate stage in an align-and expose tool. The method provides an improved metrology for aligning to a recessed alignment mark in the substrate having a material layer, such as insulating, polysilicon, and conducting layers that are inadvertently made asymmetric by processing such as chemical/mechanically polishing. The method also employs an algorithm that detects the recessed edges of the triangle and mathematically generates three lines representing the edges of the triangle. The algorithm then generates a family of lines moving inward from the edges of the triangular alignment marks and parallel to the edges until the lines converge to a common point which determines the alignment center for the triangular alignment marks.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: November 9, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Hua-Tai Lin, Gwo-Yuh Shiau, Pin-Ting Wang