Abstract: A kind of production method for carbon nanotube sponges which can control different hole sizes and densities, having uniform cell sizes. The formed carbon nanotube sponge has a soft, flexible and multi-holed structure. The carbon nanotubes pass through a hydrophilic acid process, mixing with different ratios of polymer materials PVA and are dispersed in the solvent. This mixed liquid is frozen under different controlled solidifying rates, forming different sized solid ice crystals having controllable particle sizes, and is vacuumized in the next step, which removes the frozen solvent through low pressure sublimation, the remains being the multi-holed carbon nanotube sponge structure. The size of the cells of the carbon nanotube sponge structure can be controlled through the freezing rate and the addition of polymers. The strength and stiffness can be controlled through the density of the carbon nanotubes and the addition of polymers.

Abstract: A method for bonding conductive materials by using composite adhesive made of carbon nanotubes and epoxy resin. Firstly, this composite adhesive is placed between the joining surfaces of the two conductive plates; thereafter an electric current enters from one conductive plate and passes through this composite adhesive, to the other conductive plate. As the electric current passes through the carbon nanotubes, Joule heating results in the overall temperature of the carbon nanotubes-epoxy composite adhesive increasing, leading to speedily joining and patching of the composite adhesive. This method reduces the electrical resistance of the adhesive material by providing a large area and shortening the path of the electric current, also, improving the homogeneity of the temperature of the adhesive and avoiding the positive feedback effect. The simple equipment of this method is not affected by the environment, and effectively reduces the resources and time needed to harden the epoxy resin.

Abstract: A microcontroller with expandable memory banks has a microprocessor, a plurality of memory banks with only one page for storing interrupt service routines(ISR), a memory bank control circuit connected to the microprocessor, and a multiplexer for connecting the microprocessor with the plurality of memory banks. The memory bank control circuit generates a selection signal according to an interrupt signal and a microprocessor interrupt service routine execution end signal. The multiplexer outputs a page selection signal from the microprocessor or outputs a predetermined page selection signal according to the output signal from the memory bank control circuit.

Abstract: A method for accessing a memory having a storage space larger than the addressing capability of a microprocessor. The method comprises storing an interrupt service routine in one of a plurality of memory banks, when an interrupt occurs, pushing a current program counter address onto a stack by an interrupt processing unit, and pushing a bank number of the current memory bank onto the stack. The method further comprises switching the microprocessor to the memory bank storing the interrupt service routine to execute the interrupt service routine, popping the bank number of the memory bank from the stack, restoring the popped bank number in the memory bank selector, popping the program counter address from the stack, and continuing executing the interrupted program.

Abstract: A microcontroller with expandable memory banks has a microprocessor, a plurality of memory banks with only one page for storing interrupt service routines(ISR), a memory bank control circuit connected to the microprocessor, and a multiplexer for connecting the microprocessor with the plurality of memory banks. The memory bank control circuit generates a selection signal according to an interrupt signal and a microprocessor interrupt service routine execution end signal. The multiplexer outputs a page selection signal from the microprocessor or outputs a predetermined page selection signal according to the output signal from the memory bank control circuit.