Patents by Inventor PING-CHUNG LIU

PING-CHUNG LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9368627
    Abstract: A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; and a stress memorization technology (SMT) sidewall spacer over a sidewall of the gate stack. The gate stack includes a gate dielectric layer over the semiconductor substrate and a gate electrode over the gate dielectric layer. The SMT sidewall spacer provides a stress for a channel region beneath the gate stack.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: June 14, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ping-Chung Liu, Wei-Chiang Hung, Hsiang-Yu Tsai, Kuo Hui Chang
  • Publication number: 20160079420
    Abstract: A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; and a stress memorization technology (SMT) sidewall spacer over a sidewall of the gate stack. The gate stack includes a gate dielectric layer over the semiconductor substrate and a gate electrode over the gate dielectric layer. The SMT sidewall spacer provides a stress for a channel region beneath the gate stack.
    Type: Application
    Filed: September 11, 2014
    Publication date: March 17, 2016
    Inventors: PING-CHUNG LIU, WEI-CHIANG HUNG, HSIANG-YU TSAI, KUO HUI CHANG