Abstract: A method for adjusting a programming/erasing time in a memory system is disclosed. In one embodiment, a programming/erasing step is executed for writing data into the memory system, wherein the programming/erasing step is executed until a programming/erasing time and/or a cycle number per unit of time is reached. Then, a verification step is executed for verifying the data written into the memory system to determine if the data written into the memory system is correct so as to obtain a verification result. When the verification result is incorrect, a setting step is executed for setting the programming/erasing time and/or the cycle number per unit to new values. Thereafter, the programming/erasing step is repeatedly executed for writing the data into the memory system after the programming/erasing time and/or a cycle number per unit of time is set to the values.

Abstract: A wafer level testing method for RFID tags is disclosed. The method comprises: providing a semiconductor wafer having a plurality of RFID tag chips, wherein each of the RFID tag chips includes at least one detachable inductance and an embedded capacitance to form a resonant circuit; exposing the RFID tag chips to microwave energy, wherein the RFID tag chips send a plurality of wireless signals after a wireless power conversion; receiving the wireless signals and calculating a power level thereof; and comparing the power level to a predetermined power level to obtain the wafer yield.

Abstract: A method for adjusting a programming/erasing time in a memory system is disclosed. In one embodiment, a programming/erasing step is executed for writing data into the memory system, wherein the programming/erasing step is executed until a programming/erasing time and/or a cycle number per unit of time is reached. Then, a verification step is executed for verifying the data written into the memory system to determine if the data written into the memory system is correct so as to obtain a verification result. When the verification result is incorrect, a setting step is executed for setting the programming/erasing time and/or the cycle number per unit to new values. Thereafter, the programming/erasing step is repeatedly executed for writing the data into the memory system after the programming/erasing time and/or a cycle number per unit of time is set to the values.

Abstract: An embodiment including a radio frequency identification system/RFID transponder or tag, and the interface must be able to receive measuring signals from the analog measuring device(s) or sensor module(s). The radio frequency identification device and the interface are integrated as a single die. This single die is configured to not only transmit typical RFID signals, but also the indicative value from the analog measuring device(s) to the interrogator or reader, and then, becomes human readable value.

Abstract: In the present applications of electronic products, nonvolatile memory such as EEPROM and flash is employed widely for data storage. However, traditional nonvolatile memory needs specific process to be fabricated in foundries so that the integration shows difficulty among nonvolatile memory, analog, and digital portions. Thus, the invention is issued to provide the creative method for generic monolithic CMOS process in foundries, to be integrated into the system conveniently, and to advance the time to market. The structure and operation of cell and cell array is interpreted as following.

Abstract: A new specific memory control unit design to apply program and erase function wherein use the new methodology of memory configured logic to manipulate timing parameter.

Abstract: Nowadays, RFID (radio frequency identification) products such as tags and readers become more and more popular. Therefore, the frequency band which they are operated in would get very crowded. Data fighting or collision among RFID products becomes an important issue. The invention is proposed to avoid data collision by using software program and hardware control in the RFID system.

Abstract: A non-volatile memory control circuit provides a simple source line/word line generator instead of a complicated decoder. The invention also includes a new design to reduce power consumption for many wireless applications with stable or unstable power source. The selectable multi-characteric global cell is one of advantages of the present invention.