Patents by Inventor Ping-Hsi Yang

Ping-Hsi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Defect monitoring for resist layer
    Patent number: 8852673
    Abstract: Methods for detecting and monitoring defects in a resist material are disclosed. In an example, a method includes forming a resist layer over a substrate; developing the resist layer; washing the developed resist layer with a thinner wash solution, wherein the washing reveals any negatively charged defects in the developed resist layer; and after the washing, inspecting for the negatively charged defects.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: October 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Che-Rong Laing, Li-Kong Turn, Yung-Yao Lee, Ping-Hsi Yang
  • Iterative rinse for semiconductor fabrication
    Patent number: 8476003
    Abstract: An iterative rinse for fabrication of semiconductor devices is described. The iterative rinse includes a plurality of rinse cycles, wherein each of the plurality of rinse cycles has a different resistivity. The plurality of rinse cycles may include a first rinse of a semiconductor substrate with de-ionized (DI) water and carbon dioxide (CO2), followed by a second rinse the semiconductor substrate with DI water and CO2. The first rinse has a first resistivity; the second rinse has a second resistivity lower than the first resistivity.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: July 2, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Yao Lee, Wei-Hong Chuang, Li-Shiuan Chen, Ping-Hsi Yang
  • DEFECT MONITORING FOR RESIST LAYER
    Publication number: 20130108775
    Abstract: Methods for detecting and monitoring defects in a resist material are disclosed. In an example, a method includes forming a resist layer over a substrate; developing the resist layer; washing the developed resist layer with a thinner wash solution, wherein the washing reveals any negatively charged defects in the developed resist layer; and after the washing, inspecting for the negatively charged defects.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 2, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Che-Rong Laing, Li-Kong Turn, Yung-Yao Lee, Ping-Hsi Yang
  • ITERATIVE RINSE FOR SEMICONDUCTOR FABRICATION
    Publication number: 20120231395
    Abstract: An iterative rinse for fabrication of semiconductor devices is described. The iterative rinse includes a plurality of rinse cycles, wherein each of the plurality of rinse cycles has a different resistivity. The plurality of rinse cycles may include a first rinse of a semiconductor substrate with de-ionized (DI) water and carbon dioxide (CO2), followed by a second rinse the semiconductor substrate with DI water and CO2. The first rinse has a first resistivity; the second rinse has a second resistivity lower than the first resistivity.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 13, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Yung-Yao Lee, Wei-Hong Chuang, Li-Shiuan Chen, Ping-Hsi Yang