Abstract: A semiconductor device is provided. First and second pads are electrically connected to a plurality of test structures. Each test structure includes an active region, active patterns, gate electrodes and an electrode pattern. The active region includes a rounded corner portion. The active patterns protrudes from the semiconductor substrate and extends in parallel in a first direction. The gate electrodes crosses over the active patterns in a second direction. One gate electrode is electrically connected to the first pad. The electrode pattern is disposed at a side of the gate electrode electrically connected to the first pad. The electrode pattern is electrically connected to the second pad. The electrode pattern crosses over the active patterns. An overlapping area of the electrode pattern and the active patterns in each test structure is different from an overlapping area of the electrode pattern and the active patterns in other test structures.

Abstract: A semiconductor device is provided. First and second pads are electrically connected to a plurality of test structures. Each test structure includes an active region, active patterns, gate electrodes and an electrode pattern. The active region includes a rounded corner portion. The active patterns protrudes from the semiconductor substrate and extends in parallel in a first direction. The gate electrodes crosses over the active patterns in a second direction. One gate electrode is electrically connected to the first pad. The electrode pattern is disposed at a side of the gate electrode electrically connected to the first pad. The electrode pattern is electrically connected to the second pad. The electrode pattern crosses over the active patterns. An overlapping area of the electrode pattern and the active patterns in each test structure is different from an overlapping area of the electrode pattern and the active patterns in other test structures.

Abstract: A semiconductor device is provided. First and second pads are electrically connected to a plurality of test structures. Each test structure includes an active region, active patterns, gate electrodes and an electrode pattern. The active region includes a rounded corner portion. The active patterns protrudes from the semiconductor substrate and extends in parallel in a first direction. The gate electrodes crosses over the active patterns in a second direction. One gate electrode is electrically connected to the first pad. The electrode pattern is disposed at a side of the gate electrode electrically connected to the first pad. The electrode pattern is electrically connected to the second pad. The electrode pattern crosses over the active patterns. An overlapping area of the electrode pattern and the active patterns in each test structure is different from an overlapping area of the electrode pattern and the active patterns in other test structures.

Abstract: A semiconductor device is provided. First and second pads are electrically connected to a plurality of test structures. Each test structure includes an active region, active patterns, gate electrodes and an electrode pattern. The active region includes a rounded corner portion. The active patterns protrudes from the semiconductor substrate and extends in parallel in a first direction. The gate electrodes crosses over the active patterns in a second direction. One gate electrode is electrically connected to the first pad. The electrode pattern is disposed at a side of the gate electrode electrically connected to the first pad. The electrode pattern is electrically connected to the second pad. The electrode pattern crosses over the active patterns. An overlapping area of the electrode pattern and the active patterns in each test structure is different from an overlapping area of the electrode pattern and the active patterns in other test structures.