Patents by Inventor Ping-Hung Shih
Ping-Hung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11574935Abstract: A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.Type: GrantFiled: August 19, 2020Date of Patent: February 7, 2023Assignee: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao, Peng-Che Tai, Ping-Hung Shih
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Patent number: 11506923Abstract: A display panel includes a substrate, a plurality of standard pixel units, and a plurality of dummy pixel units. A plurality of first conductor patterns and a plurality of shield blocks of a shield pattern layer are arranged in an array above the substrate. Each of the standard pixel units includes one of the first conductor patterns and a first shield block of the shield blocks. The first shield blocks and the first conductor patterns are overlapped, respectively. Each of the dummy pixel units includes a second shield block of the shield blocks. The second shield blocks and the first conductor patterns are not overlapped. A first edge of the substrate is spaced apart from a second edge of one of the standard pixel units adjacent to the dummy pixel units by a first distance. The first distance is within a range from 50 ?m to 3000 ?m.Type: GrantFiled: October 20, 2021Date of Patent: November 22, 2022Assignee: Au Optronics CorporationInventors: Ping-Hung Shih, Wei-Chieh Sun, Peng-Che Tai, Chia-Heng Chen, Jhih-Ci Chen, Meng-Ting Hsieh
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Publication number: 20220043296Abstract: A display panel includes a substrate, a plurality of standard pixel units, and a plurality of dummy pixel units. A plurality of first conductor patterns and a plurality of shield blocks of a shield pattern layer are arranged in an array above the substrate. Each of the standard pixel units includes one of the first conductor patterns and a first shield block of the shield blocks. The first shield blocks and the first conductor patterns are overlapped, respectively. Each of the dummy pixel units includes a second shield block of the shield blocks. The second shield blocks and the first conductor patterns are not overlapped. A first edge of the substrate is spaced apart from a second edge of one of the standard pixel units adjacent to the dummy pixel units by a first distance. The first distance is within a range from 50 ?m to 3000 ?m.Type: ApplicationFiled: October 20, 2021Publication date: February 10, 2022Applicant: Au Optronics CorporationInventors: Ping-Hung Shih, Wei-Chieh Sun, Peng-Che Tai, Chia-Heng Chen, Jhih-Ci Chen, Meng-Ting Hsieh
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Patent number: 11194188Abstract: A display panel includes a substrate, a plurality of standard pixel units, and a plurality of dummy pixel units. A plurality of first conductor patterns and a plurality of shield blocks of a shield pattern layer are arranged in an array above the substrate. Each of the standard pixel units includes one of the first conductor patterns and a first shield block of the shield blocks. The first shield blocks and the first conductor patterns are overlapped, respectively. Each of the dummy pixel units includes a second shield block of the shield blocks. The second shield blocks and the first conductor patterns are not overlapped. A first edge of the substrate is spaced apart from a second edge of one of the standard pixel units adjacent to the dummy pixel units by a first distance. The first distance is within a range from 50 ?m to 3000 ?m.Type: GrantFiled: November 10, 2019Date of Patent: December 7, 2021Assignee: Au Optronics CorporationInventors: Ping-Hung Shih, Wei-Chieh Sun, Peng-Che Tai, Chia-Heng Chen, Jhih-Ci Chen, Meng-Ting Hsieh
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Patent number: 11148519Abstract: A vehicle chassis including a vehicle frame defining an inner space and being operable to switch between a first expanded state and a collapsed state, and a loading device mounted to the inner space and removably connected to the vehicle frame. The loading device defines a first loading surface when the vehicle frame is in the first expanded state, and the loading device defines a second loading surface that is smaller than the first loading surface when the vehicle frame is in the collapsed state.Type: GrantFiled: November 13, 2019Date of Patent: October 19, 2021Assignee: NATIONAL TAIWAN NORMAL UNIVERSITYInventors: Yi-Hsuan Hung, Ping-Hung Shih, Li-Fan Liu, Yi-Ya Liao, Kan-Yuan Tian
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Patent number: 10971047Abstract: A device substrate including a substrate and 1st-stage to nth-stage driver units. Each of the 1st-stage to nth-stage driver units includes a pulldown element, a reset element, and an output element. A gate of the pulldown element is used for receiving a corresponding first start signal or a reset signal. A gate of the reset element is used for receiving the reset signal. A drain of the output element is used for outputting a corresponding gate driving signal. A gate of the pulldown element of the nth-stage driver unit is electrically connected with the gate of the reset element of the nth-stage driver unit so as to make the gate of the pulldown element of the nth-stage driver unit be used for receiving the reset signal.Type: GrantFiled: October 8, 2019Date of Patent: April 6, 2021Assignee: Au Optronics CorporationInventors: Chia-Heng Chen, Yi-Fu Chen, Ping-Hung Shih, Wei-Chieh Sun, Peng-Che Tai, Jhih-Ci Chen
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Publication number: 20210057453Abstract: A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.Type: ApplicationFiled: August 19, 2020Publication date: February 25, 2021Applicant: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao, Peng-Che Tai, Ping-Hung Shih
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Publication number: 20200410914Abstract: A device substrate including a substrate and 1st-stage to nth-stage driver units. Each of the 1st-stage to nth-stage driver units includes a pulldown element, a reset element, and an output element. A gate of the pulldown element is used for receiving a corresponding first start signal or a reset signal. A gate of the reset element is used for receiving the reset signal. A drain of the output element is used for outputting a corresponding gate driving signal. A gate of the pulldown element of the nth-stage driver unit is electrically connected with the gate of the reset element of the nth-stage driver unit so as to make the gate of the pulldown element of the nth-stage driver unit be used for receiving the reset signal.Type: ApplicationFiled: October 8, 2019Publication date: December 31, 2020Applicant: Au Optronics CorporationInventors: Chia-Heng Chen, Yi-Fu Chen, Ping-Hung Shih, Wei-Chieh Sun, Peng-Che Tai, Jhih-Ci Chen
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Patent number: 10852608Abstract: A display panel includes an array substrate, a first pixel unit, a first data line, a common line, a first fanout line, and an opposite substrate. The array substrate includes a substrate including a first display region, a second display region, and a non-display region. The second display region includes a first side and a second side connected to the first side. The non-display region is adjacent connected to the first side. The first display region is adjacent connected to the second side. The first display region has a third side opposite to the second side. The third side is substantially aligned with an edge of the substrate. A first fanout line is disposed on the non-display region and connected to the first data line. The first fanout line has an end substantially aligned with the edge of the substrate.Type: GrantFiled: December 2, 2019Date of Patent: December 1, 2020Assignee: AU OPTRONICS CORPORATIONInventors: Ping-Hung Shih, Meng-Ting Hsieh
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Publication number: 20200363688Abstract: A display panel includes an array substrate, a first pixel unit, a first data line, a common line, a first fanout line, and an opposite substrate. The array substrate includes a substrate including a first display region, a second display region, and a non-display region. The second display region includes a first side and a second side connected to the first side. The non-display region is adjacent connected to the first side. The first display region is adjacent connected to the second side. The first display region has a third side opposite to the second side. The third side is substantially aligned with an edge of the substrate. A first fanout line is disposed on the non-display region and connected to the first data line. The first fanout line has an end substantially aligned with the edge of the substrate.Type: ApplicationFiled: December 2, 2019Publication date: November 19, 2020Inventors: Ping-Hung SHIH, Meng-Ting HSIEH
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Publication number: 20200239078Abstract: A vehicle chassis including a vehicle frame defining an inner space and being operable to switch between a first expanded state and a collapsed state, and a loading device mounted to the inner space and removably connected to the vehicle frame. The loading device defines a first loading surface when the vehicle frame is in the first expanded state, and the loading device defines a second loading surface that is smaller than the first loading surface when the vehicle frame is in the collapsed state.Type: ApplicationFiled: November 13, 2019Publication date: July 30, 2020Applicant: National Taiwan Normal UniversityInventors: Yi-Hsuan HUNG, Ping-Hung SHIH, Li-Fan LIU, Yi-Ya LIAO, Kan-Yuan TIAN
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Publication number: 20200166797Abstract: A display panel includes a substrate, a plurality of standard pixel units, and a plurality of dummy pixel units. A plurality of first conductor patterns and a plurality of shield blocks of a shield pattern layer are arranged in an array above the substrate. Each of the standard pixel units includes one of the first conductor patterns and a first shield block of the shield blocks. The first shield blocks and the first conductor patterns are overlapped, respectively. Each of the dummy pixel units includes a second shield block of the shield blocks. The second shield blocks and the first conductor patterns are not overlapped. A first edge of the substrate is spaced apart from a second edge of one of the standard pixel units adjacent to the dummy pixel units by a first distance. The first distance is within a range from 50 ?m to 3000 ?m.Type: ApplicationFiled: November 10, 2019Publication date: May 28, 2020Applicant: Au Optronics CorporationInventors: Ping-Hung Shih, Wei-Chieh Sun, Peng-Che Tai, Chia-Heng Chen, Jhih-Ci Chen, Meng-Ting Hsieh
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Patent number: 10451935Abstract: An electronic device includes a substrate, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer includes at least two first segments and at least one first connection line. The first connection line is connected to the at least two first segments. The second conductive layer includes at least two second segments and at least one second connection line. The at least two second segments do not overlap the at least two first segments in a normal direction of the substrate. The second connection line connects the at least two second segments. The second connection line overlaps the first connection line in the normal direction of the substrate. The third conductive layer includes at least one first connection electrode. The first connection electrode is electrically connected to the at least two first segments and the at least two second segments.Type: GrantFiled: April 28, 2019Date of Patent: October 22, 2019Assignee: Au Optronics CorporationInventors: Kun-Lung Huang, Ping-Hung Shih
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Publication number: 20190285929Abstract: An electronic device includes a substrate, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer includes at least two first segments and at least one first connection line. The first connection line is connected to the at least two first segments. The second conductive layer includes at least two second segments and at least one second connection line. The at least two second segments do not overlap the at least two first segments in a normal direction of the substrate. The second connection line connects the at least two second segments. The second connection line overlaps the first connection line in the normal direction of the substrate. The third conductive layer includes at least one first connection electrode. The first connection electrode is electrically connected to the at least two first segments and the at least two second segments.Type: ApplicationFiled: April 28, 2019Publication date: September 19, 2019Applicant: Au Optronics CorporationInventors: Kun-Lung Huang, Ping-Hung Shih
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Patent number: 10297619Abstract: An array substrate includes a substrate, first signal lines, sub-pixels, reference potential lines, first bonding pads, second bonding pads, first fan-out lines, second fan-out lines, first connection lines, second connection lines, and a first reference potential line. An accommodation space exists between a first connection line closest to the second bonding pads and a second connection line closest to the first bonding pads. The first reference potential line is disposed in the accommodation space and electrically connected with the reference potential lines.Type: GrantFiled: December 21, 2017Date of Patent: May 21, 2019Assignee: Au Optronics CorporationInventors: Kun-Lung Huang, Ping-Hung Shih
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Patent number: 10274795Abstract: An electronic device includes a substrate, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer includes at least two first segments and at least one first connection line. The first connection line is connected to the at least two first segments. The second conductive layer includes at least two second segments and at least one second connection line. The at least two second segments do not overlap the at least two first segments in a normal direction of the substrate. The second connection line connects the at least two second segments. The second connection line overlaps the first connection line in the normal direction of the substrate. The third conductive layer includes at least one first connection electrode. The first connection electrode is electrically connected to the at least two first segments and the at least two second segments.Type: GrantFiled: June 15, 2018Date of Patent: April 30, 2019Assignee: Au Optronics CorporationInventors: Kun-Lung Huang, Ping-Hung Shih
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Publication number: 20190051668Abstract: An array substrate includes a substrate, first signal lines, sub-pixels, reference potential lines, first bonding pads, second bonding pads, first fan-out lines, second fan-out lines, first connection lines, second connection lines, and a first reference potential line. An accommodation space exists between a first connection line closest to the second bonding pads and a second connection line closest to the first bonding pads. The first reference potential line is disposed in the accommodation space and electrically connected with the reference potential lines.Type: ApplicationFiled: December 21, 2017Publication date: February 14, 2019Applicant: Au Optronics CorporationInventors: Kun-Lung Huang, Ping-Hung Shih
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Publication number: 20070161134Abstract: A method of using nanoparticles to fabricate an emitting layer of an optical communication light source on a substrate is proposed, in which a host capable of reacting with unstable ions on the surface of a rare earth ions nanomaterial is used as a carrier of nanoparticles to make the rare earth ions nanomaterial release rare earth ions, thereby forming an emitting layer that can be excited by an external current or light source to emit light.Type: ApplicationFiled: March 8, 2006Publication date: July 12, 2007Inventors: Ching-Fuh Lin, Kuo-Jui Sun, Ping-Hung Shih, Yi-Shin Su