Patents by Inventor Ping Kong
Ping Kong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240161798Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.Type: ApplicationFiled: January 25, 2024Publication date: May 16, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li YANG, He-Zhou WAN, Mu-Yang YE, Lu-Ping KONG, Ming-Hung CHANG
-
Patent number: 11939190Abstract: The present invention relates an elevating apparatus based on a hetero-oriented non-isometric, dual-spiral drive structure, comprising a first carrier and a second carrier, further comprising a first support and a second support that are telescoped together in a manner that they can rotate with respect to each other, the first support is provided with a first recessed portion and a first raised portion that shares the same spiral direction and spiral pitch, the second support is provided with a homo-oriented, isometric, dual-spiral second recessed portion that has a spiral direction different from that of the first recessed portion. The carrier of the present invention is provided in a simply-supported-beam, and the carrier force can be achieved without additional weight, and the operation is stable and reliable.Type: GrantFiled: August 6, 2021Date of Patent: March 26, 2024Assignees: TAIZHOU UNIVERSITY, JIANGSU ZHIJI ENVIORNMENTAL PROTECTION TECHNOLOGY CO., LTD.Inventors: Xiangdong Kong, Ping Dong
-
Patent number: 11923041Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.Type: GrantFiled: July 5, 2022Date of Patent: March 5, 2024Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li Yang, He-Zhou Wan, Mu-Yang Ye, Lu-Ping Kong, Ming-Hung Chang
-
Publication number: 20240021225Abstract: A device includes a first memory subarray, a first modulation circuit, a second memory subarray, a second modulation circuit and a control signal generator. The first modulation circuit is coupled to the first memory subarray. The second memory subarray is located between the first memory subarray and the first modulation circuit along a direction. The second modulation circuit is coupled to the second memory subarray. The control signal generator is configured to generate a first control signal to trigger the first modulation circuit according to a first length of the first memory subarray along the direction, and configured to generate a second control signal to trigger the second modulation circuit according to a second length of the second memory subarray along the direction.Type: ApplicationFiled: September 27, 2023Publication date: January 18, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li YANG, He-Zhou WAN, Mu-Yang YE, Lu-Ping KONG, Ming-Hung CHANG
-
Publication number: 20230352085Abstract: A circuit comprises a memory array, a tracking bit line and a timing control circuit. The memory array comprises a plurality of tracking cells. The tracking bit line is coupled between a first node and the plurality of tracking cells. The timing control circuit is coupled to the first node and comprises a Schmitt trigger. The Schmitt trigger generates a negative bit line enable signal in response to that a voltage level on the first node being below a low threshold voltage value of the Schmitt trigger. The timing control circuit generates a negative bit line trigger signal according to the negative bit line enable signal for adjusting voltage levels of a plurality of bit lines of the memory array.Type: ApplicationFiled: June 29, 2023Publication date: November 2, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC Nanjing Company Limited, TSMC China Company LimitedInventors: Xiu-Li YANG, Lu-Ping KONG, Kuan CHENG, He-Zhou WAN
-
Patent number: 11735251Abstract: A circuit includes a tracking word line, a power switch, a tracking bit line, a sense circuit. The power switch is coupled between the tracking word line and a first node. The power switch is configured to discharge a voltage level on the first node in response to a clock pulse signal transmitted through the tracking word line to the power switch. The tracking bit line is coupled between the first node and a plurality of tracking cells in a memory array. The sense circuit is coupled between the first node and a second node. The sense circuit is configured to generate a negative bit line enable signal in response to that the voltage level on the first node is below a threshold voltage value of the sense circuit.Type: GrantFiled: February 23, 2021Date of Patent: August 22, 2023Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li Yang, Lu-Ping Kong, Kuan Cheng, He-Zhou Wan
-
Publication number: 20230225329Abstract: The disclosure, in one aspect, relates to compositions containing non-pathogenic Burkholderia species SSG and/or extracts from SSG cultures and methods of making and using the same. Also disclosed are methods for treating and preventing plant diseases caused by pathogens, the methods including applying the disclosed compositions to plants and/or soil, diseased leaf debris, or other plant growth media surrounding the plants. Finally, disclosed are methods for increasing plant growth using the disclosed compositions. The compositions are effective as well as environmentally benign and are not detrimental to human or animal health This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present disclosure.Type: ApplicationFiled: March 3, 2021Publication date: July 20, 2023Inventor: Ping KONG
-
Publication number: 20230122135Abstract: A device is provided. The device includes multiple transistors, a first sense circuit, and a precharge circuit. The transistors are coupled to a tracking bit line and configured to generate a first tracking signal. The first sense circuit is configured to generate a first sense tracking signal in response to the first tracking signal. The precharge circuit is configured to generate, in response to a rising edge and a falling edge of the first sense tracking signal, a precharge signal for precharging data lines.Type: ApplicationFiled: December 20, 2022Publication date: April 20, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC Nanjing Company Limited, TSMC China Company LimitedInventors: Xiu-Li YANG, He-Zhou WAN, Lu-Ping KONG, Wei-Yang JIANG
-
Patent number: 11557336Abstract: A device is disclosed. The device includes a first tracking control line, a first tracking circuit, a first sense circuit, and a precharge circuit. The first tracking control line is configured to transmit a first tracking control signal. The first tracking circuit is configured to generate, in response to the first tracking control signal, a first tracking signal associated with first tracking cells in a memory array. The first sense circuit is configured to receive the first tracking signal, and is configured to generate a first sense tracking signal in response to the first tracking signal. The precharge circuit is configured to generate, in response to a rising edge of the first sense tracking signal and a falling edge of a read enable delayed signal, a precharge signal for precharging data lines associated with memory cell in the memory array. A method is also disclosed herein.Type: GrantFiled: November 30, 2020Date of Patent: January 17, 2023Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li Yang, He-Zhou Wan, Lu-Ping Kong, Wei-Yang Jiang
-
Publication number: 20220335992Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.Type: ApplicationFiled: July 5, 2022Publication date: October 20, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li YANG, He-Zhou WAN, Mu-Yang YE, Lu-Ping KONG, Ming-Hung CHANG
-
Patent number: 11398261Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.Type: GrantFiled: January 25, 2021Date of Patent: July 26, 2022Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li Yang, He-Zhou Wan, Mu-Yang Ye, Lu-Ping Kong, Ming-Hung Chang
-
Publication number: 20220189541Abstract: A circuit includes a tracking word line, a power switch, a tracking bit line, a sense circuit. The power switch is coupled between the tracking word line and a first node. The power switch is configured to discharge a voltage level on the first node in response to a clock pulse signal transmitted through the tracking word line to the power switch. The tracking bit line is coupled between the first node and a plurality of tracking cells in a memory array. The sense circuit is coupled between the first node and a second node. The sense circuit is configured to generate a negative bit line enable signal in response to that the voltage level on the first node is below a threshold voltage value of the sense circuit.Type: ApplicationFiled: February 23, 2021Publication date: June 16, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC Nanjing Company Limited, TSMC China Company LimitedInventors: Xiu-Li YANG, Lu-Ping KONG, Kuan CHENG, He-Zhou WAN
-
Publication number: 20220165315Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.Type: ApplicationFiled: January 25, 2021Publication date: May 26, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITEDInventors: Xiu-Li YANG, He-Zhou WAN, Mu-Yang YE, Lu-Ping KONG, Ming-Hung CHANG
-
Publication number: 20220139452Abstract: A device is disclosed. The device includes a first tracking control line, a first tracking circuit, a first sense circuit, and a precharge circuit. The first tracking control line is configured to transmit a first tracking control signal. The first tracking circuit is configured to generate, in response to the first tracking control signal, a first tracking signal associated with first tracking cells in a memory array. The first sense circuit is configured to receive the first tracking signal, and is configured to generate a first sense tracking signal in response to the first tracking signal. The precharge circuit is configured to generate, in response to a rising edge of the first sense tracking signal and a falling edge of a read enable delayed signal, a precharge signal for precharging data lines associated with memory cell in the memory array. A method is also disclosed herein.Type: ApplicationFiled: November 30, 2020Publication date: May 5, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC Nanjing Company Limited, TSMC China Company LimitedInventors: Xiu-Li YANG, He-Zhou WAN, Lu-Ping KONG, Wei-Yang JIANG
-
Publication number: 20210282477Abstract: The present disclosure provides a face shield including one or more airstream-deflecting protrusions for deflecting airstream away from the wearer so as to avoid bacteria, virus or any other hazardous materials in the airstream from depositing on the head and/or hair of a wearer. The present disclosure further provides a full face shield including a flexible sheet, and the flexible sheet has a top portion comprising two folding structures located adjacent to lateral edges of the flexible sheet respectively for bending the top portion towards a forehead of a wearer. As the top portion of the full face shield is bent towards a forehead of the wearer through the folding structure, the face, forehead and a large portion of the front skull of the wearer can be protected.Type: ApplicationFiled: January 21, 2021Publication date: September 16, 2021Inventors: Hau-chung MAN, Ki-fung CHENG, Kin-man HO, Ping-kong WAI, Lok Ting LAU, Yifan ZHANG, Wing-fai WONG
-
Patent number: 10382158Abstract: An optical transmission system comprises at least one first connection point and one second connection point arranged to transmit and receive at least one channel signal transmitted via at least one optical means connecting the first connection point and the second connection, wherein each of the at least one channel signal is reversibly configurable to be transmitted in either a first direction or a second direction between the first connection point and the second connection point. A method of transmitting at least one channel signal between a first connection point and a second connection point via at least one optical media in an optical transmission system, wherein each of the at least one channel signal is reversibly configurable to be transmitted in either a first direction or a second direction between the first and the second connection points.Type: GrantFiled: October 1, 2015Date of Patent: August 13, 2019Assignees: The Hong Kong Polytechnic University, Versitech LimitedInventors: Chun-yin Li, Ping-Kong Alexander Wai, Victor On-Kwok Li
-
Publication number: 20190039085Abstract: A nozzle assembly having a nozzle body with nozzle bore extending between a proximal portion and a distal portion of the nozzle body; and a tube having a lumen extending between a proximal end and a distal end of the tube, wherein the tube is joined to the nozzle body through the nozzle bore, such that the proximal end of the tube extends beyond the proximal portion of the nozzle body and the distal end of the tube extends beyond the distal portion of the nozzle body.Type: ApplicationFiled: August 7, 2017Publication date: February 7, 2019Inventors: Kuok Hang MAK, Tsz Kit YU, Ping Kong CHOY, Gary Peter WIDDOWSON
-
Publication number: 20170296989Abstract: A self-cleaning extruding apparatus with two co-rotating screws and the method thereof are provided here. Said apparatus is comprised of a screw mechanism, a barrel (1), a feeding port (10), a venting port (11), and a discharge port (12). Said screw mechanism is comprised of the first screw with one tip (3) and the second screw with two tips (4). There is a baffle in the channel of the first screw and the baffle's height is lower than that of the screw flight. The baffle will cause hyperbolic perturbation in the shape of a ‘figure 8’ flow pattern above the top of the baffle. The first and second screws rotate at the same speed and touch each other at all times, thereby achieving a self-cleaning function. The baffle will generate chaotic mixing in the screw channel caused by the hyperbolic perturbation. Topological chaos is also introduced into the screw channel by the mechanism ‘one part divided into two parts, then two parts converging into one part, and then one part divided into two parts once more’.Type: ApplicationFiled: December 28, 2015Publication date: October 19, 2017Applicant: Guangdong Industry Technical CollegeInventors: Baiping Xu, Huiwen Yu, Ping Kong, Lixuan Wu, Jiangang Li, Meigui Wang
-
Patent number: 9689453Abstract: An active vibration absorber is attachable to a structure incorporating a positioning system which serves to vibrate the structure during its operation. The active vibration absorber comprises a mounting portion for attachment to the structure, an inertial mass that is resiliently coupled to the mounting portion and a force actuator which is operative to controllably move the inertial mass relative to the mounting portion. The force actuator is configured to move the inertial mass relative to the mounting body according to a motion profile during a motion cycle of the positioning system in order to attenuate vibrations in the structure. The motion profile is determined from a motion command which is operative to drive the positioning system during the motion cycle.Type: GrantFiled: February 6, 2014Date of Patent: June 27, 2017Assignee: ASM TECHNOLOGY SINGAPORE PTE. LTD.Inventors: Ping Kong Choy, Jinchun Huang, Xianghua Xing, Hoi Yue Yung
-
Patent number: 9575102Abstract: A dispersed state monitoring device for distributed generation includes a power module, an input conditioning module, a data processing module and a network communication module which are connected one after another in this order. The power is input, via a civil plug and a 220V power socket, to the power module and the input conditioning module in the device at the same time. The power module ensures normal operation of the device through conditioning of a voltage. The input conditioning module is configured to condition input voltage signals, extract voltage transient-state and steady-state signals to be analyzed, and inputting the signals to the data processing module. The data processing module is configured to analyze the voltage transient-state and steady-state signals, judge the operating state of the distributed power source, and output a judging result to the network communication module. The result is output from the network communication module via a standard RJ45 Ethernet interface.Type: GrantFiled: December 17, 2012Date of Patent: February 21, 2017Assignees: JINING POWER SUPPLY COMPANY OF STATE GRID SHANDONG ELECTRIC POWER COMPANY, STATE GRID CORPORATION OF CHINAInventors: Qinglin Qian, Yanliang Wang, Shuxi Xu, Xiaohong Chen, Lifeng Zhu, Zongjie Liu, Ping Kong, Lei Xu, Zijia Ding, Yundong Xiao, Bing Yuan