Patents by Inventor Ping-Liang LIN
Ping-Liang LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12191327Abstract: The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.Type: GrantFiled: November 2, 2023Date of Patent: January 7, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Yu Wei, Hsin-Chi Chen, Kuo-Cheng Lee, Ping-Hao Lin, Hsun-Ying Huang, Yen-Liang Lin, Yu Ting Kao
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Patent number: 12170301Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.Type: GrantFiled: February 22, 2024Date of Patent: December 17, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wen Huang, Chung-Liang Cheng, Ping-Hao Lin, Kuo-Cheng Lee
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Publication number: 20240363319Abstract: A plasma monitoring device including at least one first cathode, at least one second cathode, a first collimator group, a first mass flow controller group, and a plasma emission monitor is disclosed. The first cathode has a first target and provides a first plasma. The second cathode has a second target and provides a second plasma. The first collimator group is disposed corresponding to the first cathode to detect a first spectrum of the first plasma. The first mass flow controller group provides gas to the first cathode and the second cathode through a first gas supply pipe group and a second gas supply pipe group. The plasma emission monitor adjusts a flow rate of the gas provided by the first mass flow controller group according to the first spectrum of the first plasma. The first target and the second target are the same. A total number of collimator groups is less than a total number of cathodes.Type: ApplicationFiled: July 18, 2023Publication date: October 31, 2024Applicant: Dah Young Vacuum Equipment Co., Ltd.Inventors: Tzu-Hou Chan, Ching-Yen Lin, Chu-Liang Ho, Ping-Yen Hsieh, Ying-Hung Chen
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Patent number: 12041771Abstract: The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines. The patterning process includes depositing a first hard mask layer in a divot formed on a top portion of a polysilicon layer interposed between a first polysilicon gate structure and a second polysilicon gate; depositing a second hard mask layer on the first hard mask layer. The patterning process also includes performing a first etch to remove the second hard mask layer and a portion of the second hard mask layer from the divot; performing a second etch to remove the second hard mask layer from the divot; and performing a third etch to remove the polysilicon layer not covered by the first and second hard mask layers to form a separation between the first polysilicon gate structure and the second polysilicon structure.Type: GrantFiled: July 26, 2022Date of Patent: July 16, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yen-Jou Wu, Chih-Ming Lee, Keng-Ying Liao, Ping-Pang Hsieh, Su-Yu Yeh, Hsin-Hui Lin, Yu-Liang Wang
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Patent number: 9904561Abstract: A computer system and a method for setting basic input/output system (BIOS) are disclosed. The computer system comprises a remote computer and servers. The remote computer transmits a setting command. Each of the servers comprises a first management unit and a motherboard. The motherboard comprises a storage device and a processor. The storage device stores the BIOS. The processor executes the BIOS. The processor communicates with the first management unit to determine whether the BIOS configuration needs to be updated after the server rebooted. The processor updates the BIOS according to the setting command when the BIOS configuration must to be updated.Type: GrantFiled: August 7, 2014Date of Patent: February 27, 2018Assignee: QUANTA COMPUTER INC.Inventors: Ping-Liang Lin, Yung-Fu Li
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Patent number: 9467380Abstract: A data center network flow migration method includes detecting a utilized loading value in each switch of a plurality of switches in the data center network by a controller according to topology information of the data center network. The controller re-establishes a plurality of link paths corresponding to the plurality of switches in the data center network according to the utilized loading value in each switch and a disjoint edge node divided spanning tree algorithm. In these re-established link paths corresponding to the plurality of switches in the data center network, if the utilized loading value of at least one link path is greater than a threshold value, the at least one link paths with the utilized loading value greater than the threshold value is rerouted by a controller according to a flow migration algorithm.Type: GrantFiled: March 30, 2015Date of Patent: October 11, 2016Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Wei-Fan Hong, Kuo-Chen Wang, Yu-Chun Yeh, Dean-Chung Wang, Ping-Liang Lin
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Publication number: 20160156558Abstract: A data center network flow migration method includes detecting a utilized loading value in each switch of a plurality of switches in the data center network by a controller according to topology information of the data center network. The controller re-establishes a plurality of link paths corresponding to the plurality of switches in the data center network according to the utilized loading value in each switch and a disjoint edge node divided spanning tree algorithm. In these re-established link paths corresponding to the plurality of switches in the data center network, if the utilized loading value of at least one link path is greater than a threshold value, the at least one link paths with the utilized loading value greater than the threshold value is rerouted by a controller according to a flow migration algorithm.Type: ApplicationFiled: March 30, 2015Publication date: June 2, 2016Inventors: Wei-Fan Hong, Kuo-Chen Wang, Yu-Chun Yeh, Dean-Chung Wang, Ping-Liang Lin
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Publication number: 20150355913Abstract: A computer system and a method for setting basic input/output system (BIOS) are disclosed. The computer system comprises a remote computer and servers. The remote computer transmits a setting command. Each of the servers comprises a first management unit and a motherboard. The motherboard comprises a storage device and a processor. The storage device stores the BIOS. The processor executes the BIOS. The processor communicates with the first management unit to determine whether the BIOS configuration needs to be updated after the server rebooted. The processor updates the BIOS according to the setting command when the BIOS configuration must to be updated.Type: ApplicationFiled: August 7, 2014Publication date: December 10, 2015Applicant: Quanta Computer Inc.Inventors: Ping-Liang LIN, Yung-Fu LI
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Publication number: 20090139456Abstract: A system for maintaining the environmental optimum inside the water stored in an aquarium is provided. The system includes a maintaining unit, a sensing unit, and a processing/controlling unit. The maintaining unit is used to adjust the ecological environment inside the water. The sensing unit detects the physical and chemical characteristics of the water and outputs an environmental data in responsive to the detected characteristics. The processing/controlling unit receives and analyzes the environmental data for estimating the ecological environment inside the water so as to control the maintaining unit according to the estimation. Therefore, the system is capable of maintaining the environmental optimum of the aquarium meeting the requirement of the aquatic animals and plants therein.Type: ApplicationFiled: December 3, 2007Publication date: June 4, 2009Inventor: Ping-Liang LIN