Patents by Inventor Ping-Lung Wang

Ping-Lung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11809262
    Abstract: A power adjustment circuit, an adjustable power supply system and an adjustable power supply method are provided. The adjustable power supply system includes a power module, a device power supply, and a control circuit. The device power supply provides a supplied power to a device to be tested according to an operating voltage. The control circuit outputs an adjustment signal to the power module according to a power consumption status of the device to be tested. The power module generates the operating voltage according to the adjustment signal, and allows a first power dissipation generated by the device power supply to be less than a predetermined power.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: November 7, 2023
    Assignee: YOUNGTEK ELECTRONICS CORPORATION
    Inventors: Ching-Yung Tseng, Yong-Da Weng, Ping-Lung Wang
  • Publication number: 20230343666
    Abstract: A packaging method and a package structure are provided. The packaging method includes the following steps. Firstly, a plurality of chips are disposed on a carrying surface of a carrying board for chip redistribution. Each of the chips includes a first side connected to the carrying surface and a second side opposite to the first side, and the second side is provided with at least one chip connecting member. Next, a base structure is provided. The base structure has a bonding surface provided with a plurality of predetermined areas for bonding the chips respectively, and each of the predetermined regions has at least one electrically connecting structure formed therein. Lastly, an encapsulating material is applied to integrate the base structure, the chips, and the carrying board into a unitary structure under specific hot pressing conditions.
    Type: Application
    Filed: July 13, 2022
    Publication date: October 26, 2023
    Inventors: CHIN-JUI LIANG, Hui-Yen Huang, PING-LUNG WANG
  • Patent number: 11699675
    Abstract: A semiconductor device with high heat dissipation efficiency includes a base structure, a semiconductor chip, a heat dissipating structure, and a package body. The semiconductor chip is disposed on the base structure and has a first surface distant from the base structure. The heat dissipating structure includes a buffer layer and a first heat spreader. The buffer layer is disposed on the first surface of the semiconductor chip and a coverage rate thereof on the first surface is at least 10%. The first heat spreader is disposed on the buffer layer and bonded to the first surface of the semiconductor chip through the buffer layer. The package body encloses the semiconductor chip and the heat dissipating structure, and the package body and the buffer layer have the same heat curing temperature.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: July 11, 2023
    Assignee: HARVATEK CORPORATION
    Inventors: Chin-Jui Liang, Hui-Yen Huang, Ping-Lung Wang
  • Publication number: 20230215785
    Abstract: A vertical type multi-chip device includes a base structure, an intermediate layer, a first functional chip, and a second functional chip. The intermediate layer is disposed on the base structure and has a first signal transmission path and a second signal transmission path. The first functional chip is embedded in the intermediate layer and electrically connected to the base structure. The second functional chip is disposed on the intermediate layer and configured to be electrically connected to the first functional chip via the first signal transmission path and to the base structure via the second signal transmission path.
    Type: Application
    Filed: March 8, 2022
    Publication date: July 6, 2023
    Inventors: CHIN-JUI LIANG, Hui-Yen Huang, FENG-HUI CHUANG, PING-LUNG WANG
  • Publication number: 20230215786
    Abstract: A planar multi-chip device includes a base structure and a plurality of functional chips. The base structure has a central area and a peripheral area outside the central area. The central area includes a first conductive portion arranged therein. The peripheral area includes a plurality of second conductive portions and a plurality of third conductive portions arranged therein and separated from each other. The functional chips are arranged on the base structure, and each of the functional chips has a portion located on and electrically connected to the first conductive portion. At least two of the functional chips are configured to be in signal communication with each other via at least one of the third conductive portions.
    Type: Application
    Filed: March 10, 2022
    Publication date: July 6, 2023
    Inventors: CHIN-JUI LIANG, Hui-Yen Huang, FENG-HUI CHUANG, PING-LUNG WANG
  • Patent number: 11658257
    Abstract: A light source assembly includes a plurality of cells and a driving circuit. Each of the cells includes a transistor and a light source. The transistor includes a drain region that serves as a cathode of the light source. The driving circuit is configured to drive the cell. An optical sensor cell and a method for manufacturing thereof are also disclosed.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 23, 2023
    Assignee: HARVATEK CORPORATION
    Inventors: Mam-Tsung Wang, Shyi-Ming Pan, Ping-Lung Wang
  • Publication number: 20230026488
    Abstract: A method for transferring objects and a transfer apparatus using the same are provided. The method includes the following steps: controlling, during a first period, the ejector at an ejecting working position to perform an ejecting process along with a first direction, to transfer the object from the first substrate to the second substrate; controlling, during a second period, the ejector to move to an ejecting standby position along with a second direction which is non-parallel to the first direction, to expose at least one of the object on the first substrate to a detection range of an image capturing device; detecting the position of the object in the detection range to obtain calibration information; and adjusting the position of the first substrate according to the calibration information.
    Type: Application
    Filed: July 18, 2022
    Publication date: January 26, 2023
    Inventors: Tsan-Hsiung LAI, Guang-Chen CHEN, Yang-Chieh CHEN, Wei-Liang CHOU, Ping-Lung WANG
  • Patent number: 11531065
    Abstract: A multi-channel timing calibration device and a method applicable thereto are provided. The device includes: a plurality of channel inputs, at least one relay switch, at least one comparator, at least one first multiplexer, and a time measurement chip. The at least one comparator is connected to the at least one relay switch, and connected to a reference voltage or a digital analog converter. The at least one first multiplexer has different signals for different channel groups and outputs a signal of a designated channel. The time measurement chip calculates a timing difference of each of the channels of each of the channel inputs as a basis for delay of the timing signals.
    Type: Grant
    Filed: August 29, 2021
    Date of Patent: December 20, 2022
    Assignee: YOUNGTEK ELECTRONICS CORPORATION
    Inventors: Ching-Yung Tseng, Yu-Chih Cheng, Ping-Lung Wang
  • Publication number: 20220359451
    Abstract: A semiconductor device with high heat dissipation efficiency includes a base structure, a semiconductor chip, a heat dissipating structure, and a package body. The semiconductor chip is disposed on the base structure and has a first surface distant from the base structure. The heat dissipating structure includes a buffer layer and a first heat spreader. The buffer layer is disposed on the first surface of the semiconductor chip and a coverage rate thereof on the first surface is at least 10%. The first heat spreader is disposed on the buffer layer and bonded to the first surface of the semiconductor chip through the buffer layer. The package body encloses the semiconductor chip and the heat dissipating structure, and the package body and the buffer layer have the same heat curing temperature.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 10, 2022
    Inventors: Chin-Jui LIANG, Hui-Yen HUANG, Ping-Lung WANG
  • Publication number: 20220155845
    Abstract: A power adjustment circuit, an adjustable power supply system and an adjustable power supply method are provided. The adjustable power supply system includes a power module, a device power supply, and a control circuit. The device power supply provides a supplied power to a device to be tested according to an operating voltage. The control circuit outputs an adjustment signal to the power module according to a power consumption status of the device to be tested. The power module generates the operating voltage according to the adjustment signal, and allows a first power dissipation generated by the device power supply to be less than a predetermined power.
    Type: Application
    Filed: July 23, 2021
    Publication date: May 19, 2022
    Inventors: Ching-Yung Tseng, Yong-Da Weng, PING-LUNG WANG
  • Publication number: 20220146575
    Abstract: A multi-channel timing calibration device and a method applicable thereto are provided. The device includes: a plurality of channel inputs, at least one relay switch, at least one comparator, at least one first multiplexer, and a time measurement chip. The at least one comparator is connected to the at least one relay switch, and connected to a reference voltage or a digital analog converter. The at least one first multiplexer has different signals for different channel groups and outputs a signal of a designated channel. The time measurement chip calculates a timing difference of each of the channels of each of the channel inputs as a basis for delay of the timing signals.
    Type: Application
    Filed: August 29, 2021
    Publication date: May 12, 2022
    Inventors: Ching-Yung Tseng, Yu-Chih Cheng, PING-LUNG WANG
  • Patent number: 11322542
    Abstract: A light-emitting diode (LED) assembly comprises a plurality of LED cells and a driving circuit. Each of the LED cells includes an LED and a transistor. The LED includes first and second LED layers and an LED electrode. The first LED layer includes a III-V compound semiconductor. The second LED layer is over the first LED layer. The LED electrode is over the second LED layer. The first LED layer is free of an LED electrode. The transistor includes a drain region connected to the first LED layer. The driving circuit is configured to drive the LED cells.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: May 3, 2022
    Assignee: HARVATEK CORPORATION
    Inventors: Shyi-Ming Pan, Mam-Tsung Wang, Ping-Lung Wang
  • Patent number: 11145565
    Abstract: A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: October 12, 2021
    Assignee: YOUNGTEK ELECTRONICS CORPORATION
    Inventors: Hsi-Ying Yuan, Tung-Chuan Wang, Chun-Yuan Hou, Ping-Lung Wang, Tzu-kuei Wen
  • Publication number: 20210305313
    Abstract: A light-emitting diode (LED) assembly comprises a plurality of LED cells and a driving circuit. Each of the LED cells includes an LED and a transistor. The LED includes first and second LED layers and an LED electrode. The first LED layer includes a III-V compound semiconductor. The second LED layer is over the first LED layer. The LED electrode is over the second LED layer. The first LED layer is free of an LED electrode. The transistor includes a drain region connected to the first LED layer. The driving circuit is configured to drive the LED cells.
    Type: Application
    Filed: March 27, 2020
    Publication date: September 30, 2021
    Inventors: SHYI-MING PAN, MAM-TSUNG WANG, PING-LUNG WANG
  • Publication number: 20210305449
    Abstract: A light source assembly includes a plurality of cells and a driving circuit. Each of the cells includes a transistor and a light source. The transistor includes a drain region that serves as a cathode of the light source. The driving circuit is configured to drive the cell. An optical sensor cell and a method for manufacturing thereof are also disclosed.
    Type: Application
    Filed: August 28, 2020
    Publication date: September 30, 2021
    Inventors: MAM-TSUNG WANG, SHYI-MING PAN, PING-LUNG WANG
  • Patent number: 10980935
    Abstract: An enema device and a method for using the same are disclosed. The enema device includes a non-plastic container and a liquid delivery tube. The non-plastic container is made of glass, stainless steel, or ceramic. The non-plastic container includes a bottom wall and an annular sidewall extending upwardly from the peripheral of the bottom wall, wherein the bottom wall has a bottom planar surface. The liquid delivery tube is in fluid communication with a containing chamber of the non-plastic container. Therefore, harmful effects to the human body from plasticizer can be prevented.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: April 20, 2021
    Assignee: HARVATEK CORPORATION
    Inventor: Ping-Lung Wang
  • Publication number: 20210043532
    Abstract: A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.
    Type: Application
    Filed: June 10, 2020
    Publication date: February 11, 2021
    Inventors: HSI-YING YUAN, TUNG-CHUAN WANG, CHUN-YUAN HOU, PING-LUNG WANG, Tzu-kuei Wen
  • Publication number: 20190151530
    Abstract: An enema device and a method for using the same are disclosed. The enema device includes a non-plastic container and a liquid delivery tube. The non-plastic container is made of glass, stainless steel, or ceramic. The non-plastic container includes a bottom wall and an annular sidewall extending upwardly from the peripheral of the bottom wall, wherein the bottom wall has a bottom planar surface. The liquid delivery tube is in fluid communication with a containing chamber of the non-plastic container. Therefore, harmful effects to the human body from plasticizer can be prevented.
    Type: Application
    Filed: May 17, 2018
    Publication date: May 23, 2019
    Inventor: PING-LUNG WANG
  • Patent number: 9799810
    Abstract: A light emitting device includes a side-emitting assembly, a reflecting cup arranged on a side of the side-emitting assembly, and a package for accommodating the side-emitting assembly and the reflecting cup. The side-emitting assembly with a side surface includes a light emitting chip, a wavelength conversion layer coated on the light emitting chip, and a reflecting layer arranged above the wavelength conversion layer. The reflecting cup has an inner surface facing the side surface of the side-emitting assembly. The inner surface of the reflecting cup is a multifocal paraboloid. The multifocal paraboloid includes multistage paraboloids. The corresponding focal points of the multistage paraboloids are symmetrically distributed on the side surface of the side-emitting assembly.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: October 24, 2017
    Assignee: HARVATEK CORPORATION
    Inventors: Zhi-Ting Ye, Shyi-Ming Pan, Chia-Hung Pan, Ping-Lung Wang
  • Patent number: 9563076
    Abstract: A display panel includes a substrate and a plurality of light emitting elements. The substrate has an inner edge and an outer edge opposite to each other. The inner edge is enclosed to form an enclosed opening. The light emitting elements are disposed on the substrate and enclose the enclosed opening to form an inner loop at the inner edge of the substrate and an outer loop at the outer edge of the substrate. The inner loop and the outer loop have similar shapes. A composite display panel is also disclosed.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: February 7, 2017
    Assignee: Harvatek Corporation
    Inventors: Ping-Lung Wang, Song-Yi Hsiao