Patents by Inventor Ping Sager

Ping Sager has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7360103
    Abstract: A mechanism for P-state feedback to operating system (OS) with hardware coordination is described herein. In one embodiment, an example of a process includes, but is not limited to, receiving data from a processor representing an average performance over a previous period of time, and determining a performance state (P-state) for a next period of time based in part on the data representing the average performance over the previous period of time. Other methods and apparatuses are also described.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: April 15, 2008
    Assignee: Intel Corporation
    Inventors: Bernard J. Lint, Alon Naveh, Shivnandan D. Kaushik, Jeffrey R. Wilcox, Lance E. Hacking, Ping Sager, Kushagra Vaid, Todd A. Dutton
  • Patent number: 7146514
    Abstract: In one embodiment of the present invention, a method includes determining utilization values for a plurality of processors having power utilization dependencies, and identifying a target frequency for the plurality of processors based on the utilization values.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: December 5, 2006
    Assignee: Intel Corporation
    Inventors: Shivnandan D. Kaushik, Ping Sager
  • Publication number: 20050262365
    Abstract: A mechanism for P-state feedback to operating system (OS) with hardware coordination is described herein. In one embodiment, an example of a process includes, but is not limited to, receiving data from a processor representing an average performance over a pervious period of time, and determining a performance state (P-state) for a next period of time based in part on the data representing the average performance over the previous period of time. Other methods and apparatuses are also described.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Bernard Lint, Alon Naveh, Shivnandan Kaushik, Jeffrey Wilcox, Lance Hacking, Ping Sager, Kushagra Vaid, Todd Dutton
  • Publication number: 20050022038
    Abstract: In one embodiment of the present invention, a method includes determining utilization values for a plurality of processors having power utilization dependencies, and identifying a target frequency for the plurality of processors based on the utilization values.
    Type: Application
    Filed: July 23, 2003
    Publication date: January 27, 2005
    Inventors: Shivnandan Kaushik, Ping Sager