Patents by Inventor Ping Sheng WU

Ping Sheng WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152321
    Abstract: A floating point pre-alignment structure for computing-in-memory applications includes a time domain exponent computing block and an input mantissa pre-align block. The time domain exponent computing block is configured to compute a plurality of original input exponents and a plurality of original weight exponents to generate a plurality of flags. Each of the flags is determined by adding one of the original input exponents and one of the original weight exponents. The input mantissa pre-align block is configured to receive a plurality of original input mantissas and shift the original input mantissas according to the flags to generate a plurality of weighted input mantissas, and sparsity of the weighted input mantissas is greater than sparsity of the original input mantissas. Each of the flags has a negative correlation with a sum of the one of the original input exponents and the one of the original weight exponents.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Meng-Fan CHANG, Ping-Chun WU, Jin-Sheng REN, Li-Yang HONG, Ho-Yu CHEN
  • Patent number: 11967357
    Abstract: A memory unit with time domain edge delay accumulation for computing-in-memory applications is controlled by a first word line and a second word line. The memory unit includes at least one memory cell, at least one edge-delay cell multiplexor and at least one edge-delay cell. The at least one edge-delay cell includes a weight reader and a driver. The weight reader is configured to receive a weight and a multi-bit analog input voltage and generate a multi-bit voltage according to the weight and the multi-bit analog input voltage. The driver is connected to the weight reader and configured to receive an edge-input signal. The driver is configured to generate an edge-output signal having a delay time according to the edge-input signal and the multi-bit voltage. The delay time of the edge-output signal is positively correlated with the multi-bit analog input voltage multiplied by the weight.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: April 23, 2024
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Ping-Chun Wu, Li-Yang Hong, Jin-Sheng Ren, Jian-Wei Su
  • Patent number: 11545891
    Abstract: A power device includes a power factor corrector, an auxiliary capacitor, a switching device, an auxiliary boost circuit, a controller and a voltage conversion device. The switching device has a first end electrically connected to the output end of the power factor corrector, and a second end electrically connected to one end of the auxiliary capacitor. An output end of the auxiliary boost circuit is electrically connected to the output end of the power factor corrector, an input end of the auxiliary boost circuit is electrically connected to a middle end of the switching device, and a ground end of the auxiliary boost circuit is electrically connected to another end of the auxiliary capacitor. The controller is electrically connected to the switching device and the auxiliary boost circuit. The input end of the voltage conversion device is electrically connected to the output end of the power factor corrector.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: January 3, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chien-An Lai, Jyun-Jhe Jhang, Chien-Yao Liao, Ping-Sheng Wu, I Chen, Chang-Yuan Hsu
  • Publication number: 20220173653
    Abstract: A power device includes a power factor corrector, an auxiliary capacitor, a switching device, an auxiliary boost circuit, a controller and a voltage conversion device. The switching device has a first end electrically connected to the output end of the power factor corrector, and a second end electrically connected to one end of the auxiliary capacitor. An output end of the auxiliary boost circuit is electrically connected to the output end of the power factor corrector, an input end of the auxiliary boost circuit is electrically connected to a middle end of the switching device, and a ground end of the auxiliary boost circuit is electrically connected to another end of the auxiliary capacitor. The controller is electrically connected to the switching device and the auxiliary boost circuit. The input end of the voltage conversion device is electrically connected to the output end of the power factor corrector.
    Type: Application
    Filed: August 8, 2021
    Publication date: June 2, 2022
    Inventors: Chien-An LAI, Jyun-Jhe Jhang, Chien-Yao Liao, Ping-Sheng Wu, I Chen, Chang-Yuan Hsu
  • Publication number: 20140001727
    Abstract: A bicycle includes a front wheel attached to a front fork, a rear wheel attached to a rear fork, and a pair of cranks and a driving sprocket attached to a wheel hub of the bicycle frame, a foot pedal drive and propulsion device includes a shaft attached to the bicycle frame and located behind the rear wheel and disposed parallel to the rear wheel axle, a pair of levers each include a middle portion pivotally attached to the cranks and a rear portion slidably coupled to the shaft to form a retractable and telescopic structure, and a pair of foot pedals are adjustably attached to the front portions of the levers at selected positions for applying an increased driving torque to the cranks.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Inventor: Ping Sheng WU