Abstract: A method for collecting residues of curable material includes: performing a curing process on a semiconductor wafer in a chamber, where the semiconductor wafer is held by a wafer cassette, and residues of curable material is formed in the chamber; and collecting the residues of curable material. A first portion of the residues dripping from a ceiling of the chamber is directed toward a tray using a flow-directing structure, where the flow-directing structure is below the ceiling of the chamber, the flow-directing structure includes a central opening and a slanted surface sloped to direct the first portion of the residues toward the central opening. The first portion of the residues is collected on a collecting surface of the tray which covers the central opening of the flow-directing structure.

Abstract: A dual pass band filter element includes: a substrate, and a bandpass filtering structure and an anti-reflection structure formed on two opposite surfaces of the substrate. The bandpass filtering structure includes a plurality of first material layers and a plurality of second material layers with a refractive index higher than the respective first material layers, wherein the first and second material layers are stacked alternately along the normal of the substrate; the dual pass band filter element has a first pass band and a second pass band that does not overlap with the first pass band in a band of 400 nm to 1800 nm. In this way, two different bands of light are allowed to pass through the dual pass band filter element, thereby expanding the application field of the dual pass band filter element.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.

Abstract: A chip package includes a redistribution layer, a chip, and an encapsulation member. The redistribution layer includes an insulation part, a plurality of first pads and a plurality of second pads, where the insulation part has a first surface, a second surface opposite to the first surface, and a side surface between the first surface and the second surface. The first pads and the second pads are located at the first surface and the second surface respectively. The chip is disposed on the first surface and electrically connected to the first pads. The encapsulation member wraps the chip and the redistribution layer, and covers the first surface and the side surface, where the encapsulation member exposes the second pads, and the encapsulation member is not flush with the first surface and the side surface.