Patents by Inventor Ping Yang

Ping Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12093689
    Abstract: A processing system that includes a shared data fabric resets a first client processor while operating a second client processor. The first client processor is instructed to stop making requests to one or more devices of the shared data fabric. Status communications are blocked between the first client processor and a memory controller, the second client processor, or both, such that the first client processor enters a temporary offline state. The first client processor is indicated as being non-coherent. Accordingly, when the processor is reset some errors and efficiency losses due messages sent during or prior to the reset are prevented.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: September 17, 2024
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Benjamin Tsien, Alexander J. Branover, John Petry, Chen-Ping Yang, Rostyslav Kyrychynskyi, Vydhyanathan Kalyanasundharam
  • Patent number: 12094946
    Abstract: A device includes a nanostructure, a gate dielectric layer, a gate electrode, and a gate contact. The nanostructure is over a substrate. The gate dielectric layer laterally surrounds the nanostructure. The gate electrode laterally surrounds the gate dielectric layer. The gate electrode has a bottom surface and a top surface both higher than a bottom end of the nanostructure. The gate electrode has a horizontal dimension decreasing from the bottom surface to the top surface. The gate contact is electrically coupled to the gate electrode.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Chih Wang, Yu-Chieh Liao, Tai-I Yang, Hsin-Ping Chen
  • Publication number: 20240301369
    Abstract: The present disclosure relates to the field of bioengineering and pharmaceutical and chemical production. In particular, provided is a polynucleotide comprising a coding sequence of toluene dioxygenase. Also provided are an expression cassette, a vector and a host cell comprising the polynucleotide, as well as use thereof in the preparation of cis-cyclohexadiene o-diol compounds.
    Type: Application
    Filed: January 5, 2022
    Publication date: September 12, 2024
    Inventors: Yong YANG, Ping HUANG, Biao JIANG, Wenfeng ZHU
  • Publication number: 20240302262
    Abstract: A method and a system for identifying a glacial lake outburst debris flow (GLODF) are provided. The method is obtained based on considering induced influences of slopes of channels and particle sizes of source particles on the GLODF. The method not only compensates for deficiencies in identifying the GLODF, but also realizes determination of the GLODF, which provides data basis for disaster prevention and control layout such as monitoring and early warning on a glacial lake and assists preventing and managing disasters caused by the GLODF. Meanwhile, multiple parameters used in the method are easy and convenient to obtain, and the parameters can be directly used on site, which saves engineering cost, improves working efficiency, and has high practical and promotional value in environmental protection and disaster prevention and mitigation.
    Type: Application
    Filed: March 8, 2024
    Publication date: September 12, 2024
    Inventors: Zhi-quan Yang, Zi-xu Zhang, Wen-qi Jiao, Ying-yan Zhu, Muhammad Asif Khan, Yong-shun Han, Li-ping Liao, Jie Zhang, Wen-fei Xi, Han-hua Xu, Tian-bing Xiang, Xin Zhao, Bi-hua Zhang, Shen-zhang Liu, Cheng-yin Ye
  • Patent number: 12087925
    Abstract: A power supply system (10) is used for supplying power to a power system of an electric tractor and comprises a bracket (100) that is provided above and below a frame of a transport trailer, first cases (200) that are provided on the bracket and first power battery packs that are suspended inside the first case. Each of the first cases is provided with a first ventilation structure and a second ventilation structure (211) so that while the transport trailer is moving, wind can enter the first case from the first ventilation structure and be discharged from the second ventilation structure, thus achieving further cooling and heat dissipation for the first power battery packs and avoiding service life being impacted due to the first power battery pack overheating.
    Type: Grant
    Filed: August 7, 2022
    Date of Patent: September 10, 2024
    Assignee: Hoi Tung Innotek (Shenzhen) Co., Ltd.
    Inventors: Xiaoliang Sun, Ping Lin, Zhiwen Xie, Anming Yang, Linmao Guo
  • Patent number: 12077873
    Abstract: A method for manufacturing nitride catalyst is provided, which includes putting a Ru target and an M target into a nitrogen-containing atmosphere, in which M is Ni, Co, Fe, Mn, Cr, V, Ti, Cu, or Zn. The method also includes providing powers to the Ru target and the M target, respectively. The method also includes providing ions to bombard the Ru target and the M target for depositing MxRuyN2 on a substrate by sputtering, wherein 0<x<1.3, 0.7<y<2, and x+y=2, wherein MxRuyZ2 is cubic crystal system or amorphous.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: September 3, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Hsin Lin, Li-Duan Tsai, Wen-Hsuan Chao, Chiu-Ping Huang, Pin-Hsin Yang, Hsiao-Chun Huang, Jiunn-Nan Lin, Yu-Ming Lin
  • Patent number: 12076315
    Abstract: The invention provides compositions containing a stable crystalline form of brequinar and methods of making such composition. The invention also provides methods of using such compositions to treat a condition in a subject.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: September 3, 2024
    Assignee: Clear Creek Bio, Inc.
    Inventors: Abdolsamad Tadayon, Ping Huang, Chaoyi Deng, Jinsuo Yang, Qingqing Lu, Lin Cui, Mo Jia, Xianjun You, David P. Hesson, Siyi Jiang
  • Patent number: 12080593
    Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Ping Chen, Ming-Han Lee, Shin-Yi Yang, Yung-Hsu Wu, Chia-Tien Wu, Shau-Lin Shue, Min Cao
  • Publication number: 20240290381
    Abstract: A device is provided. The device includes multiple transistors, a first sense circuit, and a precharge circuit. The transistors are coupled to a tracking bit line and configured to generate a first tracking signal. The first sense circuit is configured to generate a first sense tracking signal in response to the first tracking signal. The precharge circuit is configured to generate, in response to a rising edge and a falling edge of the first sense tracking signal, a precharge signal for precharging data lines.
    Type: Application
    Filed: April 29, 2024
    Publication date: August 29, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC Nanjing Company Limited, TSMC China Company Limited
    Inventors: Xiu-Li YANG, He-Zhou WAN, Lu-Ping KONG, Wei-Yang JIANG
  • Patent number: 12072522
    Abstract: The invention provides a display device including a display panel and a backlight module including a light guide plate, a light source, and an optical film. The light guide plate has light incident and exit surfaces. The light source is disposed at one side of the light incident surface. The optical film is overlapped with the light exit surface, and has first optical microstructures facing the light exit surface. The display panel includes a liquid crystal cell overlapped with the light exit surface, first and second polarizers respectively disposed at two opposite sides of the liquid crystal cell, and a phase retardation film disposed between the first and second polarizers. The first polarizer is located between the liquid crystal cell and the optical film. An axial direction of an optical axis of the phase retardation film is perpendicular to an axial direction of an absorption axis of the first polarizer.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: August 27, 2024
    Assignee: Coretronic Corporation
    Inventors: Ping-Yen Chen, Chung-Yang Fang, Jen-Wei Yu
  • Publication number: 20240282728
    Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.
    Type: Application
    Filed: May 2, 2024
    Publication date: August 22, 2024
    Inventors: Ming-Hong Chang, Chun-Yi Yang, Kun-Ming Huang, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Publication number: 20240280901
    Abstract: A photoresist composition is provided, including a chemical amplification matrix, wherein the chemical amplification matrix includes a polymer resin, a photoacid generator and a solvent; and a dissolution inhibitor, which is a small molecular material containing a diazo naphthoquinone structure. A method for using the photoresist composition is further provided.
    Type: Application
    Filed: November 3, 2022
    Publication date: August 22, 2024
    Inventors: Xiangang LUO, Dongxu YANG, Xian PENG, Kaixin SU, Zeyu ZHAO, Ping GAO, Changtao WANG
  • Publication number: 20240283756
    Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.
    Type: Application
    Filed: January 29, 2024
    Publication date: August 22, 2024
    Inventors: Shaopeng HE, Cunming LIANG, Jiang YU, Ziye YANG, Ping YU, Bo CUI, Jingjing WU, Liang MA, Hongjun NI, Zhiguo WEN, Changpeng LIU, Anjali Singhai JAIN, Daniel DALY, Yadong LI
  • Patent number: 12069481
    Abstract: The present invention relates to an improved KNN-based 6LoWPAN network intrusion detection method. The present invention selects quantifiable security features which can reflect a self-security state of network elements of a 6LoWPAN network for training, and establishes a 6LoWPAN network feature space. The present invention assigns the weights to the features and transfers zero points, to alleviate the bias caused by large and small impact factors and simplify calculation; realizes construction and update of a state data table of network elements by extracting the feature data of network elements in real time, thus forming a normal contour updated according to the real-time state of the network in the feature space of the 6LoWPAN network based on the clustering effect of a KNN algorithm; and the present invention improves the KNN algorithm and redefines a basis for judging the invasion, to meet the requirements for 6LoWPAN network intrusion detection.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 20, 2024
    Assignee: Chongqing University of Posts and Telecommunications
    Inventors: Min Wei, Yuan Zhuang, Tao Yang, Ping Wang
  • Patent number: 12067140
    Abstract: A method and system for storing electronic documents based on a distributed environment includes the following steps of: a storage management server receives a document data stream sent by a client; the storage management server parses the document type of the electronic document; the storage management server Match the corresponding first storage server based on the document type of the electronic document and the user information; the storage management server sends the corresponding electronic document to the corresponding first storage server; the first storage server is based on the first storage server The digital watermark loading rule of the server loads the digital watermark on the electronic document; the first storage server stores the electronic document loaded with the digital watermark.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: August 20, 2024
    Assignee: Jiaying Technology Co., Ltd.
    Inventors: Sheng Yang, Haibo Zeng, Ping Yuan, Bicheng Tang, Ying Huang
  • Publication number: 20240275713
    Abstract: This application provides a route processing method and a network device that are applied to the Internet. Specifically, the method includes: A first network device determines that a first BGP route is unavailable, and then the first network device determines a second BGP route associated with the first BGP route, where the first BGP route and the second BGP route are from a same autonomous system AS. In other words, a path through which the first BGP route is transmitted and a path through which the second BGP route is transmitted include the same AS. Then, the first network device reduces a priority of the second BGP route.
    Type: Application
    Filed: April 29, 2024
    Publication date: August 15, 2024
    Inventors: Shunwan ZHUANG, Haibo WANG, Ping'an YANG, Donglei PANG
  • Patent number: 12062611
    Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece having an interconnect structure that includes a first conductive feature, a second conductive feature disposed beside the first conductive feature, and an inter-level dielectric disposed between the first conductive feature and the second conductive feature. A conductive material of an etch stop layer is selectively deposited on the first conductive feature and on the second conductive feature without depositing the conductive material on the inter-level dielectric, and the inter-level dielectric is removed to form a gap between the first conductive feature and the second conductive feature.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: August 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tai-I Yang, Li-Lin Su, Yung-Hsu Wu, Hsin-Ping Chen, Cheng-Chi Chuang
  • Publication number: 20240266228
    Abstract: An embodiment method includes: forming fins extending from a semiconductor substrate; depositing an inter-layer dielectric (ILD) layer on the fins; forming masking layers on the ILD layer; forming a cut mask on the masking layers, the cut mask including a first dielectric material, the cut mask having first openings exposing the masking layers, each of the first openings surrounded on all sides by the first dielectric material; forming a line mask on the cut mask and in the first openings, the line mask having slot openings, the slot openings exposing portions of the cut mask and portions of the masking layers, the slot openings being strips extending perpendicular to the fins; patterning the masking layers by etching the portions of the masking layers exposed by the first openings and the slot openings; and etching contact openings in the ILD layer using the patterned masking layers as an etching mask.
    Type: Application
    Filed: April 17, 2024
    Publication date: August 8, 2024
    Inventors: Chien-Yuan Chen, Jui-Ping Lin, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12058846
    Abstract: A titanium sulfide (TiS) nanomaterial and a composite material thereof for wave absorption are disclosed. The TiS nanomaterial is in a form of dispersed micro-particles which are bulks formed by stacking two-dimensional nano-sheets. The TiS nanomaterial is a bulk formed by stacking two-dimensional nano-sheets, thereby having a laminated structure that improves the wave absorption effect. In addition, experimental results demonstrate that the TiS nanomaterial with a dose of 40 wt % has the most excellent wave absorption performance, with a minimum reflection loss up to ?47.4 dB, an effective absorption bandwidth of 5.9 GHz and an absorption peak frequency of 6.8 GHz, which are superior to those of existing two-dimensional bulk materials. One of reasons for the excellent wave absorption performance of the TiS nanomaterial may be because the laminated micro-morphology of TiS results in the electromagnetic wave refraction loss.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: August 6, 2024
    Assignee: CHONGQING UNIVERSITY
    Inventors: Yuxin Zhang, Kailin Li, Ping′an Yang, Xiaoying Liu, Shihai Ren, Shuang Yi, Jinsong Rao, Nan Li, Lichao Dong, Dalong Cong, Jingying Bai, Wenxiang Shu
  • Publication number: 20240260455
    Abstract: A compound represented by the following general formula (1) is useful as a charge transport material and others in organic light emitting materials. Ar1 to Ar3 each represents an aryl group or a heteroaryl group and at least one of Ar1 to Ar3 contains a skeleton represented by the following general formula (2). In the general formula (2), X represents O or S. R1 to R8 each represent a hydrogen atom, a substituent or a bonding position.
    Type: Application
    Filed: January 16, 2024
    Publication date: August 1, 2024
    Inventors: YuSeok YANG, Keiro NASU, Asuka YOSHIZAKI, Ping Kuen Daniel TSANG, Ayataka ENDO, Hiroko NOMURA, Hidetoshi FUJIMURA, Naoto NOTSUKA