Patents by Inventor Ping-Yu Hsieh

Ping-Yu Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11442662
    Abstract: A data writing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes: receiving a write command from a host system; and determining whether to write a data corresponding to the write command into a first area or a second area according to a write amplification factor of the first area, where if it is determined to write the data into the second area, copying the written data to the first area after writing the data.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: September 13, 2022
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Ping-Chuan Lin, Hsiang-Jui Huang, Ping-Yu Hsieh, Tsung-Ju Wu
  • Publication number: 20210342097
    Abstract: A data writing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes: receiving a write command from a host system; and determining whether to write a data corresponding to the write command into a first area or a second area according to a write amplification factor of the first area, where if it is determined to write the data into the second area, copying the written data to the first area after writing the data.
    Type: Application
    Filed: May 22, 2020
    Publication date: November 4, 2021
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ping-Chuan Lin, Hsiang-Jui Huang, Ping-Yu Hsieh, Tsung-Ju Wu
  • Patent number: 10685735
    Abstract: The invention provides a memory management method, a memory storage device, and a memory control circuit unit. The method includes: recording an error bit number of each upper physical programming unit and an error bit number of each lower physical programming unit of each of the physical erasing units; determining whether a first physical erasing unit is a bad physical erasing unit according to distributions of the error bit numbers of the upper physical programming units and the lower physical programming units of the first physical erasing unit of the physical erasing units; and performing a data transfer operation on data in the first physical erasing unit if the first physical erasing unit is determined as the bad physical erasing unit.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: June 16, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Ping-Chuan Lin, Shii-Yeu Chern, Hsiang-Jui Huang, Ping-Yu Hsieh, Zih-Jia Wang, Yun-You Lin