Abstract: A computing device is provided, including memory storing an instruction storage location. The computing device may further include a processor system including a plurality of processor threads. The processor system may suspend execution of one or more respective processor threads of the plurality of processor threads. The processor system may store one or more respective processor thread contexts of the one or more processor threads in the memory. The processor system may enter a system management mode (SMM). The processor system may determine that the instruction storage location includes a code update instruction. The processor system may perform a code update based on the code update instruction. The processor system may exit the SMM. The processor system may retrieve the one or more processor thread contexts from the memory and resume execution of the one or more processor threads without rebooting the computing device.

Abstract: A method including determining a to-be-verified data block among a plurality of data blocks corresponding to a predetermined file in a distributed storage system, wherein a storage node where the to-be-verified data block is located comprises a storage node that meets a load balancing strategy in the distributed storage system; and verifying the to-be-verified data block. The present disclosure solves the technical problem in the conventional technologies in which the read/write performance at a user front end is affected during a data verification process.

Abstract: A computing device is provided, including memory storing an instruction storage location. The computing device may further include a processor system including a plurality of processor threads. The processor system may suspend execution of one or more respective processor threads of the plurality of processor threads. The processor system may store one or more respective processor thread contexts of the one or more processor threads in the memory. The processor system may enter a system management mode (SMM). The processor system may determine that the instruction storage location includes a code update instruction. The processor system may perform a code update based on the code update instruction. The processor system may exit the SMM. The processor system may retrieve the one or more processor thread contexts from the memory and resume execution of the one or more processor threads without rebooting the computing device.

Abstract: A method including determining a to-be-verified data block among a plurality of data blocks corresponding to a predetermined file in a distributed storage system, wherein a storage node where the to-be-verified data block is located comprises a storage node that meets a load balancing strategy in the distributed storage system; and verifying the to-be-verified data block. The present disclosure solves the technical problem in the conventional technologies in which the read/write performance at a user front end is affected during a data verification process.

Abstract: A computing device is provided, including memory storing an instruction storage location. The computing device may further include a processor system including a plurality of processor threads. The processor system may suspend execution of one or more respective processor threads of the plurality of processor threads. The processor system may store one or more respective processor thread contexts of the one or more processor threads in the memory. The processor system may enter a system management mode (SMM). The processor system may determine that the instruction storage location includes a code update instruction. The processor system may perform a code update based on the code update instruction. The processor system may exit the SMM. The processor system may retrieve the one or more processor thread contexts from the memory and resume execution of the one or more processor threads without rebooting the computing device.

Abstract: Optimizations are provided for remotely debugging a node in the cloud. Initially, a SMM environment is initialized in a computer's BIOS. Then, a debug agent that is located within the SMM environment receives an instruction indicative of a chipset-specific or platform-specific health-related issue. Based on this instruction, the debug agent executes a script entry by fetching health-related information from the computer's addressable endpoints. This information includes health-related metadata and/or counter information. The debug agent then records the information. Furthermore, the debug agent obtains a resolution for the health-related issue. Here, this resolution is at least partially based on the recorded information.

Abstract: Optimizations are provided for remotely debugging a node in the cloud. Initially, a SMM environment is initialized in a computer's BIOS. Then, a debug agent that is located within the SMM environment receives an instruction indicative of a chipset-specific or platform-specific health-related issue. Based on this instruction, the debug agent executes a script entry by fetching health-related information from the computer's addressable endpoints. This information includes health-related metadata and/or counter information. The debug agent then records the information. Furthermore, the debug agent obtains a resolution for the health-related issue. Here, this resolution is at least partially based on the recorded information.