Abstract: The disclosure provides a device for impedance matching and switching for coupling a transmit path and a receive path of a transceiver to at least one antenna. The device can have an on-chip matching circuitry disposed within a chip and off-chip matching circuitry disposed outside the chip but coupled to the on-chip matching circuitry. The device can have a controller coupled to the on-chip matching circuitry configured to switch the on-chip matching circuitry to provide matched impedance for the transmit path in a transmit mode and matched impedance for the receive path in a receive mode. The off-chip matching circuitry can provide high impedance in the receive path in the transmit mode and provide high impedance in the transmit path in the receive mode. The resonant matching circuit can also have an antenna node coupling the transmit path and the receive path to the at least one antenna.

Abstract: A time-interleaved analog-to-digital converter (ADC) uses M sub-analog-to-digital converters (sub-ADCs) to, according to a sequence, sample an analog input signal to produce digital outputs. When the M sub-ADCs are interleaved, the digital outputs exhibit mismatch errors between the M sub-ADCs due to mismatches between the sub-ADCs. A more second order subtle effect is that the mismatch error for a particular digital output from a particular ADC, due to internal coupling or other such interaction and effects between the M sub-ADCs, can vary depending on which sub-ADC(s) were used before and/or after the particular sub-ADC. If M sub-ADCs are time-interleaved randomly, the mismatches between the M sub-ADCs become a function of the sub-ADC selection pattern in the sequence. The present disclosure describes mechanisms for measuring and reducing these order-dependent mismatches to achieve high dynamic range performance in the time-interleaved ADC.