Abstract: An image processing device includes a frame buffer, a first display engine, a clock signal generator, a spread spectrum clock generator, a first-in-first-out (FIFO) buffer and a reset signal generator. The FIFO buffer receives and stores the pixel digital data from the first display engine according to a data writing index controlled by a working clock signal from the clock signal generator and outputs the pixel digital data to the planar display according to a data reading index controlled by a spread spectrum clock signal from the spread spectrum clock generator. The reset signal generator receives and checks the pixel digital data and generates a reset signal to the FIFO buffer to reset the data writing index and the data reading index when one of the pixel digital data to be inputted into the FIFO buffer is consistent with a preset condition.

Abstract: An image processing device is provided. The image processing device includes a control unit, a first storing zone, a frame buffer register, a first buffering zone and a first image processor. The first storing zone is electrically connected to the control unit and storing therein a first image frame. The frame buffer register is electrically connected to the control unit and the first storing zone, and performing a first image processing operation on the first image frame in response to a first control signal from the control unit so as to form a first processed frame. The first buffering zone receives and stores the first processed frame from the frame buffer register. The first image processor is electrically connected to the first buffering zone and processing the first processed frame into a first image signal in response to a second control signal from the control unit.

Abstract: A method for scaling an image frame by an off-screen technology is provided. An image frame consisting of n rows and m columns of data is stored into a storage device. The image frame is divided into a plurality of image portions. Then, the plurality of image portions are picked in sequence to a frame buffer register. An image scaling operation is performed for each picked image portion, and then the scaled image portion is cleared from the frame buffer register.

Abstract: An image processing device includes a frame buffer, a first display engine, a clock signal generator, a spread spectrum clock generator, a first-in-first-out (FIFO) buffer and a reset signal generator. The FIFO buffer receives and stores the pixel digital data from the first display engine according to a data writing index controlled by a working clock signal from the clock signal generator and outputs the pixel digital data to the planar display according to a data reading index controlled by a spread spectrum clock signal from the spread spectrum clock generator. The reset signal generator receives and checks the pixel digital data and generates a reset signal to the FIFO buffer to reset the data writing index and the data reading index when one of the pixel digital data to be inputted into the FIFO buffer is consistent with a preset condition.

Abstract: An image processing device is provided. The image processing device includes a control unit, a first storing zone, a frame buffer register, a first buffering zone and a first image processor. The first storing zone is electrically connected to the control unit and storing therein a first image frame. The frame buffer register is electrically connected to the control unit and the first storing zone, and performing a first image processing operation on the first image frame in response to a first control signal from the control unit so as to form a first processed frame. The first buffering zone receives and stores the first processed frame from the frame buffer register. The first image processor is electrically connected to the first buffering zone and processing the first processed frame into a first image signal in response to a second control signal from the control unit.

Abstract: A method for scaling an image frame by an off-screen technology is provided. An image frame consisting of n rows and m columns of data is stored into a storage device. The image frame is divided into a plurality of image portions. Then, the plurality of image portions are picked in sequence to a frame buffer register. An image scaling operation is performed for each picked image portion, and then the scaled image portion is cleared from the frame buffer register.