Patents by Inventor Pinlei Edmund CHU

Pinlei Edmund CHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11121028
    Abstract: Semiconductor devices and methods of forming are provided. In some embodiments the semiconductor device includes a substrate, and a dielectric layer over the substrate. A first conductive feature is included in the dielectric layer, the first conductive feature comprising a first number of material layers. A second conductive feature is included in the dielectric layer, the second conductive feature comprising a second number of material layers, where the second number is higher than the first number. A first electrical connector is included overlying the first conductive feature.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wei Hsu, Ling-Fu Nieh, Pinlei Edmund Chu, Chi-Jen Liu, Yi-Sheng Lin, Ting-Hsun Chang, Chia-Wei Ho, Liang-Guang Chen
  • Patent number: 11114339
    Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ling-Fu Nieh, Chun-Wei Hsu, Pinlei Edmund Chu, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Publication number: 20210163859
    Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
    Type: Application
    Filed: February 10, 2021
    Publication date: June 3, 2021
    Inventors: Pinlei Edmund Chu, Chun-Wei Hsu, Ling-Fu Nieh, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Patent number: 10961487
    Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pinlei Edmund Chu, Chun-Wei Hsu, Ling-Fu Nieh, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Patent number: 10636701
    Abstract: Semiconductor devices and methods of forming are provided. In some embodiments the method includes forming a dielectric layer over a substrate and patterning the dielectric layer to form a first recess. The method may also include depositing a first layer in the first recess and depositing a second layer over the first layer, the second layer being different than the first layer. The method may also include performing a first chemical mechanical polish (CMP) process on the second layer using a first oxidizer and performing a second CMP process on remaining portions of the second layer and the first layer using the first oxidizer. The method may also include forming a first conductive element over the remaining portions of the first layer after the second CMP polish is performed.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wei Hsu, Ling-Fu Nieh, Pinlei Edmund Chu, Chi-Jen Liu, Yi-Sheng Lin, Ting-Hsun Chang, Chia-Wei Ho, Liang-Guang Chen
  • Publication number: 20200090997
    Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.
    Type: Application
    Filed: November 18, 2019
    Publication date: March 19, 2020
    Inventors: Ling-Fu Nieh, Chun-Wei Hsu, Pinlei Edmund Chu, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Publication number: 20200006125
    Abstract: Semiconductor devices and methods of forming are provided. In some embodiments the semiconductor device includes a substrate, and a dielectric layer over the substrate. A first conductive feature is included in the dielectric layer, the first conductive feature comprising a first number of material layers. A second conductive feature is included in the dielectric layer, the second conductive feature comprising a second number of material layers, where the second number is higher than the first number. A first electrical connector is included overlying the first conductive feature.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Inventors: Chun-Wei Hsu, Ling-Fu Nieh, Pinlei Edmund Chu, Chi-Jen Liu, Yi-Sheng Lin, Ting-Hsun Chang, Chia-Wei Ho, Liang-Guang Chen
  • Patent number: 10510601
    Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ling-Fu Nieh, Chun-Wei Hsu, Pinlei Edmund Chu, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Publication number: 20190161711
    Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
    Type: Application
    Filed: October 5, 2018
    Publication date: May 30, 2019
    Inventors: Pinlei Edmund Chu, Chun-Wei Hsu, Ling-Fu Nieh, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Publication number: 20190103308
    Abstract: Semiconductor devices and methods of forming are provided. In some embodiments the method includes forming a dielectric layer over a substrate and patterning the dielectric layer to form a first recess. The method may also include depositing a first layer in the first recess and depositing a second layer over the first layer, the second layer being different than the first layer. The method may also include performing a first chemical mechanical polish (CMP) process on the second layer using a first oxidizer and performing a second CMP process on remaining portions of the second layer and the first layer using the first oxidizer. The method may also include forming a first conductive element over the remaining portions of the first layer after the second CMP polish is performed.
    Type: Application
    Filed: March 29, 2018
    Publication date: April 4, 2019
    Inventors: Chun-Wei Hsu, Ling-Fu Nieh, Pinlei Edmund Chu, Chi-Jen Liu, Yi-Sheng Lin, Ting-Hsun Chang, Chia-Wei Ho, Liang-Guang Chen
  • Publication number: 20190096761
    Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.
    Type: Application
    Filed: August 28, 2018
    Publication date: March 28, 2019
    Inventors: Ling-Fu Nieh, Chun-Wei Hsu, Pinlei Edmund Chu, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Patent number: 10157781
    Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a conductive material in the trench and over a top surface of the material layer and polishing the conductive material with a slurry to expose the top surface of the material layer and to form a conductive structure in the trench. The method for forming a semiconductor structure further includes forming a material layer over a substrate and forming a trench in the material layer. The method for forming a semiconductor structure further includes removing the slurry with a reducing solution. In addition, the reducing solution includes a reducing agent, and a standard electrode voltage of the conductive material is greater than a standard electrode voltage of the reducing agent.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Wei Hsu, Chi-Jen Liu, Cheng-Chun Chang, Yi-Sheng Lin, Pinlei Edmund Chu, Liang-Guang Chen
  • Publication number: 20180166331
    Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a conductive material in the trench and over a top surface of the material layer and polishing the conductive material with a slurry to expose the top surface of the material layer and to form a conductive structure in the trench. The method for forming a semiconductor structure further includes forming a material layer over a substrate and forming a trench in the material layer. The method for forming a semiconductor structure further includes removing the slurry with a reducing solution. In addition, the reducing solution includes a reducing agent, and a standard electrode voltage of the conductive material is greater than a standard electrode voltage of the reducing agent.
    Type: Application
    Filed: January 9, 2017
    Publication date: June 14, 2018
    Inventors: Chun-Wei HSU, Chi-Jen LIU, Cheng-Chun CHANG, Yi-Sheng LIN, Pinlei Edmund CHU, Liang-Guang CHEN