Patents by Inventor Piotr Lubicki

Piotr Lubicki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10847971
    Abstract: Embodiments of the disclosure include a fault current limiter having a first current splitting device including a primary winding and secondary winding wound around a first core, and a second current splitting device including a primary winding and a secondary winding wound around a second core. The fault current limiter may further include a fault current limiter module (e.g., a switching module) electrically connected in series between the secondary winding of the first current splitting device and the secondary winding of the second current splitting device. The fault current limiter may further include a second fault current limiter module electrically connected in series with the secondary winding of the second current splitting device. By splitting the fault current limiter into parts with fault current limiter modules interspersed between the windings, the fault current limiter may be to be built with less insulation between the windings.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: November 24, 2020
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Adrian Wilson, Shankar Kodle, Saeed Jazebi, Piotr Lubicki
  • Publication number: 20200006937
    Abstract: Embodiments of the disclosure include a fault current limiter having a first current splitting device including a primary winding and secondary winding wound around a first core, and a second current splitting device including a primary winding and a secondary winding wound around a second core. The fault current limiter may further include a fault current limiter module (e.g., a switching module) electrically connected in series between the secondary winding of the first current splitting device and the secondary winding of the second current splitting device. The fault current limiter may further include a second fault current limiter module electrically connected in series with the secondary winding of the second current splitting device. By splitting the fault current limiter into parts with fault current limiter modules interspersed between the windings, the fault current limiter may be to be built with less insulation between the windings.
    Type: Application
    Filed: September 9, 2019
    Publication date: January 2, 2020
    Inventors: Adrian Wilson, Shankar Kodle, Saeed Jazebi, Piotr Lubicki
  • Patent number: 10468876
    Abstract: Embodiments of the disclosure include a fault current limiter (FCL) providing symmetrical electrostatic shielding. In some embodiments, a FCL includes a superconductor maintained at a first voltage greater than zero voltage, and an enclosure containing the superconductor, the enclosure maintained at a second voltage greater than zero voltage, wherein the second voltage is different from the first voltage. The FCL may include an electrical connection directly coupling the superconductor and the enclosure, wherein the electrical connection enables each of a plurality of current limiting modules of the superconductor to receive, during a fault condition, an equal or unequal sub-portion of a total voltage drop.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: November 5, 2019
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Piotr Lubicki, Saeed Jazebi, David Morrell, George Emmanuel, Paul Murphy
  • Patent number: 10447031
    Abstract: Embodiments of the disclosure include a fault current limiter having a first current splitting device including a primary winding and secondary winding wound around a first core, and a second current splitting device including a primary winding and a secondary winding wound around a second core. The fault current limiter may further include a fault current limiter module (e.g., a switching module) electrically connected in series between the secondary winding of the first current splitting device and the secondary winding of the second current splitting device. The fault current limiter may further include a second fault current limiter module electrically connected in series with the secondary winding of the second current splitting device. By splitting the fault current limiter into parts with fault current limiter modules interspersed between the windings, the fault current limiter may be to be built with less insulation between the windings.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: October 15, 2019
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Adrian Wilson, Shankar Kodle, Saeed Jazebi, Piotr Lubicki
  • Patent number: 10224181
    Abstract: A processing apparatus may include a plasma chamber to house a plasma and having a main body portion comprising an electrical insulator; an extraction plate disposed along an extraction side of the plasma chamber, the extraction plate being electrically conductive and having an extraction aperture; a substrate stage disposed outside of the plasma chamber and adjacent the extraction aperture, the substrate stage being at ground potential; and an RF generator electrically coupled to the extraction plate, the RF generator establishing a positive dc self-bias voltage at the extraction plate with respect to ground potential when the plasma is present in the plasma chamber.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: March 5, 2019
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Costel Biloiu, Piotr Lubicki, Tyler Rockwell, Christopher Campbell, Vikram Singh, Kevin M. Daniels, Richard J. Hertel, Peter F. Kurunczi, Alexandre Likhanskii
  • Publication number: 20180309288
    Abstract: Embodiments of the disclosure include a fault current limiter (FCL) providing symmetrical electrostatic shielding. In some embodiments, a FCL includes a superconductor maintained at a first voltage greater than zero voltage, and an enclosure containing the superconductor, the enclosure maintained at a second voltage greater than zero voltage, wherein the second voltage is different from the first voltage. The FCL may include an electrical connection directly coupling the superconductor and the enclosure, wherein the electrical connection enables each of a plurality of current limiting modules of the superconductor to receive, during a fault condition, an equal or unequal sub-portion of a total voltage drop.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr Lubicki, Saeed Jazebi, David Morrell, George Emmanuel, Paul Murphy
  • Publication number: 20180123338
    Abstract: Embodiments of the disclosure include a fault current limiter having a first current splitting device including a primary winding and secondary winding wound around a first core, and a second current splitting device including a primary winding and a secondary winding wound around a second core. The fault current limiter may further include a fault current limiter module (e.g., a switching module) electrically connected in series between the secondary winding of the first current splitting device and the secondary winding of the second current splitting device. The fault current limiter may further include a second fault current limiter module electrically connected in series with the secondary winding of the second current splitting device. By splitting the fault current limiter into parts with fault current limiter modules interspersed between the windings, the fault current limiter may be to be built with less insulation between the windings.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 3, 2018
    Inventors: Adrian Wilson, Shankar Kodle, Saeed Jazebi, Piotr Lubicki
  • Publication number: 20170309453
    Abstract: A processing apparatus may include a plasma chamber to house a plasma and having a main body portion comprising an electrical insulator; an extraction plate disposed along an extraction side of the plasma chamber, the extraction plate being electrically conductive and having an extraction aperture; a substrate stage disposed outside of the plasma chamber and adjacent the extraction aperture, the substrate stage being at ground potential; and an RF generator electrically coupled to the extraction plate, the RF generator establishing a positive dc self-bias voltage at the extraction plate with respect to ground potential when the plasma is present in the plasma chamber.
    Type: Application
    Filed: April 20, 2016
    Publication date: October 26, 2017
    Inventors: Costel Biloiu, Piotr Lubicki, Tyler Rockwell, Christopher Campbell, Vikram Singh, Kevin M. Daniels, Richard J. Hertel, Peter F. Kurunczi, Alexandre Likhanskii
  • Patent number: 9331476
    Abstract: A solid-state fault current limiter including a current splitting reactor, comprising a system current input, a passive current output and a control current output. A voltage control reactor includes a first end and a second end, the first end coupled to the control current output and the second end coupled to the passive current output. A fault current trigger circuit coupled in parallel with the voltage control reactor and configured to open when a fault current, received by the system current input, exceeds a predefined trigger current. A transient voltage control circuit coupled in parallel with the voltage control reactor to receive the fault current.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: May 3, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kasegn D. Tekletsadik, Charles L. Stanley, Semaan Fersan, Piotr Lubicki
  • Publication number: 20150055263
    Abstract: A solid-state fault current limiter including a current splitting reactor, comprising a system current input, a passive current output and a control current output. A voltage control reactor includes a first end and a second end, the first end coupled to the control current output and the second end coupled to the passive current output. A fault current trigger circuit coupled in parallel with the voltage control reactor and configured to open when a fault current, received by the system current input, exceeds a predefined trigger current. A transient voltage control circuit coupled in parallel with the voltage control reactor to receive the fault current.
    Type: Application
    Filed: August 18, 2014
    Publication date: February 26, 2015
    Inventors: Kasegn D. Tekletsadik, Charles L. Stanley, Semaan Fersan, Piotr Lubicki
  • Patent number: 8766209
    Abstract: Disclosed is a surge protection system for use with an ion source assembly. The system comprises a high voltage power source coupled in series with a thermionic diode and an ion source assembly. The high voltage power supply is enclosed in the pressure tank and drives the ion source assembly. The thermionic diode is comprised of an insulating tube disposed between the ion source assembly enclosure and the output of the high voltage power supply and makes use of existing ion source assembly components to limit damage to the power supply during arc failures of the ion source assembly.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: July 1, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Klaus Becker, Klaus Petry, Piotr Lubicki
  • Publication number: 20140021373
    Abstract: An ion implantation system and method are disclosed in which glitches in voltage are minimized by use of a modulated power supply system in the implanter. The modulated power supply system includes a traditional power supply and a control unit associated with each power supply, where the control unit is used to isolate the power supply from an electrode if a glitch or arc is detected. The control unit then restores connectivity after the glitch condition has been rectified.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 23, 2014
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Piotr Lubicki, Christopher Leavitt, Timothy Miller, Bon-Woong Koo
  • Publication number: 20130020940
    Abstract: Disclosed is a surge protection system for use with an ion source assembly. The system comprises a high voltage power source coupled in series with a thermionic diode and an ion source assembly. The high voltage power supply is enclosed in the pressure tank and drives the ion source assembly. The thermionic diode is comprised of an insulating tube disposed between the ion source assembly enclosure and the output of the high voltage power supply and makes use of existing ion source assembly components to limit damage to the power supply during arc failures of the ion source assembly.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Klaus Becker, Klaus Petry, Piotr Lubicki
  • Publication number: 20120003760
    Abstract: An ion implantation system and method are disclosed in which glitches in voltage are minimized by modifications to the power system of the implanter. These power supply modifications include faster response time, output filtering, improved glitch detection and removal of voltage blanking. By minimizing glitches, it is possible to produce solar cells with acceptable dose uniformity without having to pause the scan each time a voltage glitch is detected. For example, by shortening the duration of a voltage to about 20-40 milliseconds, dose uniformity within about 3% can be maintained.
    Type: Application
    Filed: June 15, 2011
    Publication date: January 5, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Piotr Lubicki, Bon-Woong Koo
  • Patent number: 7576337
    Abstract: A power supply system for an ion implantation system. In one particular exemplary embodiment, the system may be realized as a power supply system that includes a low frequency power inverter, a stack driver and a high voltage power generation unit that receives source power from the power inverter. The high voltage generation unit may include a high voltage transformer for providing an output power that is multiplied to a desired output level and delivered to an input terminal of an ion beam accelerator. The power supply system may also include a dielectric enclosure that encases at least a portion of the high voltage power generation unit, thereby preventing variation in the break down strength of the internal components.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: August 18, 2009
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr Lubicki, Russell Low, Steve Krause, Eric Hermanson
  • Patent number: 7453069
    Abstract: An ion accelerating device includes a series of bushing units and a series of resistor circuit units. Each resistor circuit unit is coupled to one bushing unit. A bushing unit includes three integrated conductors to establish connections to the coupled resistor circuit unit and to an immediately adjacent bushing unit such that a voltage to the bushing unit may be degraded by the resistor circuit unit before reaching the lens and that two bushing units may contact one another directly.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: November 18, 2008
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: James P. Buonodono, Edward W. Bell, Piotr Lubicki
  • Publication number: 20080135783
    Abstract: An ion accelerating device includes a series of bushing units and a series of resistor circuit units. Each resistor circuit unit is coupled to one bushing unit. A bushing unit includes three integrated conductors to establish connections to the coupled resistor circuit unit and to an immediately adjacent bushing unit such that a voltage to the bushing unit may be degraded by the resistor circuit unit before reaching the lens and that two bushing units may contact one another directly.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 12, 2008
    Inventors: James P. Buonodono, Edward W. Bell, Piotr Lubicki