Patents by Inventor Piotr Reiter

Piotr Reiter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS ENVIRONMENT
    Publication number: 20240160478
    Abstract: An apparatus to facilitate increasing processing resources in processing cores of a graphics environment is disclosed. The apparatus includes a plurality of processing resources to execute one or more execution threads; a plurality of message arbiter-processing resource (MA-PR) routers, wherein a respective MA-PR router of the plurality of MA-PR routers corresponds to a pair of processing resources of the plurality of processing resources and is to arbitrate routing of a thread control message from a message arbiter between the pair of processing resources; a plurality of local shared cache (LSC) sequencers to provide an interface between at least one LSC of the processing core and the plurality of processing resources; and a plurality of instruction caches (ICs) to store instructions of the one or more execution threads, wherein a respective IC of the plurality of ICs interfaces with a portion of the plurality of processing resources.
    Type: Application
    Filed: November 15, 2022
    Publication date: May 16, 2024
    Applicant: Intel Corporation
    Inventors: Jiasheng Chen, Chunhui Mei, Ben J. Ashbaugh, Naveen Matam, Joydeep Ray, Timothy Bauer, Guei-Yuan Lueh, Vasanth Ranganathan, Prashant Chaudhari, Vikranth Vemulapalli, Nishanth Reddy Pendluru, Piotr Reiter, Jain Philip, Marek Rudniewski, Christopher Spencer, Parth Damani, Prathamesh Raghunath Shinde, John Wiegert, Fataneh Ghodrat
  • METHOD AND APPARATUS FOR MINIMALLY INTRUSIVE INSTRUCTION POINTER-AWARE PROCESSING RESOURCE ACTIVITY PROFILING
    Publication number: 20220156068
    Abstract: Systems and methods for minimally intrusive instruction pointer-aware processing resource activity profiling are disclosed. In one embodiment, a graphics processor includes a grouping of processing resources and control logic that is associated with the grouping of processing resources. The control logic is configured to sample a state of at least one processing resource of the grouping of processing resources and to determine activity data from the state with the activity data including at least one of stalls and reason counts for stalling activity, instruction types, pipeline utilization, thread utilization, and shader activity.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 19, 2022
    Applicant: Intel Corporation
    Inventors: Michael Cole, Alexandr Kurylev, Subramaniam Maiyuran, Vikranth Vemulapalli, Sriharsha Vadlamani, Piotr Reiter
  • Method and apparatus for minimally intrusive instruction pointer-aware processing resource activity profiling
    Patent number: 11210094
    Abstract: Systems and methods for minimally intrusive instruction pointer-aware processing resource activity profiling are disclosed. In one embodiment, a graphics processor includes a grouping of processing resources and control logic that is associated with the grouping of processing resources. The control logic is configured to sample a state of at least one processing resource of the grouping of processing resources and to determine activity data from the state with the activity data including at least one of stalls and reason counts for stalling activity, instruction types, pipeline utilization, thread utilization, and shader activity.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: December 28, 2021
    Assignee: Intel Corporation
    Inventors: Michael Cole, Alexandr Kurylev, Subramaniam Maiyuran, Vikranth Vemulapalli, Sriharsha Vadlamani, Piotr Reiter
  • METHOD AND APPARATUS FOR MINIMALLY INTRUSIVE INSTRUCTION POINTER-AWARE PROCESSING RESOURCE ACTIVITY PROFILING
    Publication number: 20210096855
    Abstract: Systems and methods for minimally intrusive instruction pointer-aware processing resource activity profiling are disclosed. In one embodiment, a graphics processor includes a grouping of processing resources and control logic that is associated with the grouping of processing resources. The control logic is configured to sample a state of at least one processing resource of the grouping of processing resources and to determine activity data from the state with the activity data including at least one of stalls and reason counts for stalling activity, instruction types, pipeline utilization, thread utilization, and shader activity.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 1, 2021
    Applicant: Intel Corporation
    Inventors: Michael Cole, Alexandr Kurylev, Subramaniam Maiyuran, Vikranth Vemulapalli, Sriharsha Vadlamani, Piotr Reiter