Patents by Inventor Piotr S. Zalicki

Piotr S. Zalicki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6650426
    Abstract: A method for plasma etching a shallow recess or shallow trench at a predetermined depth by illuminating a wafer with a light source and using a spectrometer to receive the light reflected from the wafer begins with a step of detecting an etch start time, either by detecting a time of plasma ignition, as extracted from reflectance data, or a time extracted from the reflectance data when a wafer reflectance signal is observed to begin to change after a residual layer is etched away prior to beginning a recess or trench etch. The next step is measuring a reflectance intensity of light reflected from the wafer. Preferably, a plasma background signal is removed from this measurement and an array detector is used wherein the wavelength is determined using the reflectance model. Next, an etch rate is determined by fitting data representing the collected reflectance signal to the wafer reflectance model as a function of time, and extracting the etch rate from the model.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: November 18, 2003
    Assignee: SC Technology, Inc.
    Inventor: Piotr S. Zalicki
  • Patent number: 6275297
    Abstract: A method and apparatus are provided for measuring a depth geometry of a structure on a semiconductor substrate including a plurality of recessed and non-recessed portions, wherein one of the recessed and non-recessed portions includes a reference interface and one of the recessed and non-recessed portions has a dielectric layer thereon. A broadband light source irradiates the substrate and a detector detects a first spectral component comprising light reflected from the non-recessed portions, a second spectral component comprising light reflected from the recessed portions, and a third spectral component comprising light reflected from the dielectric layer. Spectral reflectance information of the detected rays is stored and a plot of reflectance intensity versus wavelength is generated. A depth geometry of one of the recessed portions and the dielectric layer are determined relative to the reference interface, based on an interferometric analysis of the plot.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: August 14, 2001
    Assignee: SC Technology
    Inventor: Piotr S. Zalicki