Abstract: Examples described herein relate to a host interface and circuitry. In some examples, the circuitry, when coupled to a physical device, is to: perform operations of a hypervisor. In some examples, the host interface is configured to route first communications to the circuitry instead of the physical device and route second communications to the physical device. In some examples, the physical device is accessible as a virtual device via the host interface.

Abstract: Examples described herein relate to a network interface device that includes packet processing circuitry to detect usage of an egress port and report the usage of the egress port to a network interface device driver to cause reallocation of hash-based packet buckets to at least one egress port to provide an allocation of hash-based packet buckets to multiple active egress ports of the network interface device with retention of bucket-to-egress port mappings except for re-allocations of one or more buckets to one or more active egress ports. In some examples, usage of the egress port is based on a count of hash buckets assigned to packets to be transmitted from the egress port or a number of bytes of packets enqueued to be transmitted from the egress port.

Abstract: Examples described herein relate to a network interface device comprising circuitry to: allocate a first number of buffers to store received packets associated with a first descriptor ring; allocate a second number of buffers to store received packets associated with a second descriptor ring; and based on receipt of a packet, copy the received packet into a number of buffers based on whether the received packet is associated with the first descriptor ring or the second descriptor ring. In some examples, the circuitry is to copy the received packet starting at an offset from a start of a starting buffer in a number of buffers, wherein the offset is based on whether the received packet is associated with the first descriptor ring or the second descriptor ring and wherein the number of buffers is based on whether the received packet is associated with the first descriptor ring or the second descriptor ring.

Abstract: Methods and apparatus for software-controlled active-backup mode of link aggregation for RDMA and virtual functions. A Network Interface Controller (NIC) includes hardware implementing first and second physical functions (PFs) including transmit and receive resources to support data transfers via first and second ports. A bonding group is created with the first and second PFs. The first PF as an active PF and used for primary data transfers while implementing the second PF as a backup PF. On a link or port failure of the active PF, the bonding group is reconfigured to employ transmit and receive resources of the backup PF such that those resources are shared with the active PF. Data transfers are then performed using the shared resources of the active PF and the backup PF. Embodiments may support RDMA data transfers using PF bonding and the solution may be implemented in virtualized environments including virtual machines (VMs) in a manner transparent to the VMs.

Abstract: A media access control architecture operates to receive bandwidth requests in a first radio frame from mobile stations for uplink transmissions. A data plane provides once per radio frame a first aggregated message to a radio scheduler in a control plane. The first aggregated message comprises bandwidth requests for uplink transmissions received in the first radio frame from the mobile stations. Two or more messages for downlink transmission of packets are received from a core network for transmission to one or more of the mobile stations. The data plane provides once per radio frame a second aggregated message to the radio scheduler. The second aggregated message comprises the messages received from the core network for downlink transmission. At least one or more uplink transmissions or one or more downlink transmissions, or combinations thereof, are scheduled by the radio scheduler.

Abstract: Briefly, in accordance with one or more embodiments, a MAC layer architecture for a base station may comprise a radio scheduler disposed in a control plane separate from the data plane modules of a data plane.

Abstract: Briefly, in accordance with one or more embodiments, a MAC layer architecture for a base station may comprise a radio scheduler disposed in a control plane separate from the data plane modules of a data plane.