Patents by Inventor PIRIYA K. HALL

PIRIYA K. HALL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Precise verification of a logic problem on a simulation accelerator
    Patent number: 10896273
    Abstract: A computer system includes a hardware accelerator and host processor. The hardware accelerator executes a simulation of a first logical model according to a plurality of simulation cycles. The host processor determines a fault checkpoint based on a logic fault that occurs in response to executing the simulation. The host processor verifies removal of the logic fault based on rerunning the simulation from the fault checkpoint.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: January 19, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John A. Schumann, Debapriya Chatterjee, Bryant Cockcroft, Kevin Barnett, Piriya K. Hall, Paul Umbarger, Karen Yokum
  • PRECISE VERIFICATION OF A LOGIC PROBLEM ON A SIMULATION ACCELERATOR
    Publication number: 20200117766
    Abstract: A computer system includes a hardware accelerator and host processor. The hardware accelerator executes a simulation of a first logical model according to a plurality of simulation cycles. The host processor determines a fault checkpoint based on a logic fault that occurs in response to executing the simulation. The host processor verifies removal of the logic fault based on rerunning the simulation from the fault checkpoint.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 16, 2020
    Inventors: JOHN A. SCHUMANN, DEBAPRIYA CHATTERJEE, BRYANT COCKCROFT, KEVIN BARNETT, PIRIYA K. HALL, PAUL UMBARGER, KAREN YOKUM