Patents by Inventor Piriyakorn Jirawattanakasem

Piriyakorn Jirawattanakasem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9288905
    Abstract: A printed circuit substrate may be configured with at least one internal lead designed and shaped to reduce solder bridging. The printed circuit substrate can have a plurality of internal leads that each has a continuously curvilinear boundary that defines an isolation channel. The isolation channel may be configured with a uniform distance that separates a first internal lead from an adjacent second internal lead.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: March 15, 2016
    Assignee: Seagate Technology LLC
    Inventors: Prapan Aparimarn, Chaovalit Chiyatan, Piriyakorn Jirawattanakasem, Joompondej Bamrungwongtaree
  • Publication number: 20150255094
    Abstract: A base plate system including a base plate with first and second opposite surfaces, a boss tower extending from the first surface of the base plate and having an outer surface, a swaging hole extending through a height of the boss tower and a height of the base plate, and a relief channel recessed in the first surface of the base plate and extending around at least a portion of the outer surface of the boss tower, wherein the relief channel comprises a shape that is different from a shape of the outer surface of the boss tower.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 10, 2015
    Inventors: Prapan Apairmarn, Rapeepat Weerachatpitucchon, Piriyakorn Jirawattanakasem, Joompondej Bamrungwongtaree
  • Patent number: 9123364
    Abstract: A base plate system including a base plate with first and second opposite surfaces, a boss tower extending from the first surface of the base plate and having an outer surface, a swaging hole extending through a height of the boss tower and a height of the base plate, and a relief channel recessed in the first surface of the base plate and extending around at least a portion of the outer surface of the boss tower, wherein the relief channel comprises a shape that is different from a shape of the outer surface of the boss tower.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: September 1, 2015
    Assignee: Seagate Technology LLC
    Inventors: Prapan Apairmarn, Rapeepat Weerachatpitucchon, Piriyakorn Jirawattanakasem, Joompondej Bamrungwongtaree
  • Publication number: 20150129284
    Abstract: A printed circuit substrate may be configured with at least one internal lead designed and shaped to reduce solder bridging. The printed circuit substrate can have a plurality of internal leads that each has a continuously curvilinear boundary that defines an isolation channel. The isolation channel may be configured with a uniform distance that separates a first internal lead from an adjacent second internal lead.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicant: Seagate Technology LLC
    Inventors: Prapan Aparimarn, Chaovalit Chiyatan, Piriyakorn Jirawattanakasem, Joompondej Bamrungwongtaree
  • Publication number: 20130163912
    Abstract: In certain embodiments, a method includes positioning a tolerance ring between a bearing assembly and an actuator arm. The tolerance ring is compressed so that the tolerance ring buckles at predetermined weak points to position the bearing assembly relative to the actuator arm. In certain embodiments, an assembly includes a tolerance ring buckle-fitted between first and second annular surfaces, the tolerance ring buckled at designated weak points to position the first annular surface to the second annular surface.
    Type: Application
    Filed: July 25, 2012
    Publication date: June 27, 2013
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Prapan Aparimarn, Piriyakorn Jirawattanakasem, Joompondej Bamrungwongtaree