Patents by Inventor Pitamber Shukla

Pitamber Shukla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10354736
    Abstract: The present disclosure is directed to a device, a method, and a non-transitory computer readable medium for determining a level of uncertainty of programmed states of memory cells. In one aspect, a memory device includes memory cells, an uncertainty prediction circuit coupled to the memory cells, and a data conversion circuit coupled to the memory cells. The uncertainty prediction circuit is configured to determine, from a subset of the memory cells coupled to a word line, a number of memory cells having a predetermined state. The data conversion circuit is configured to apply a data conversion to a portion of data stored by the subset of the memory cells, in response to the uncertainty prediction circuit determining that the number of memory cells is between a first threshold and a second threshold.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: July 16, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Nian Niles Yang, Pitamber Shukla
  • Publication number: 20190180822
    Abstract: A non-volatile memory system comprises a memory structure and a control circuit connected to the memory structure. The memory structure includes one or more planes of non-volatile memory cells. Each plane is divided into a plurality of partial planes. The control circuit is configured to write to and read from the memory cells by writing a partial page into a particular partial plane and reading the partial page from the particular partial plane using a set of parameters optimized for the particular partial plane.
    Type: Application
    Filed: April 17, 2018
    Publication date: June 13, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Mohan V Dunga, Pitamber Shukla
  • Publication number: 20190180831
    Abstract: A high-performance write operation to program data to a group of non-volatile memory cells may be completed in response to applying a single programming pulse to the group. Programming of the cells may be verified (and/or corrected) after completion of the command. Verifying programming of the cells may comprise identifying under-programmed cells, and applying an additional programming pulse to the identified cells. The under-programmed cells may comprise cells within an under-program range below a target level. The under-program range may be determined based on a threshold voltage distribution of the cells in response to applying the single programming pulse.
    Type: Application
    Filed: April 30, 2018
    Publication date: June 13, 2019
    Inventors: Pitamber Shukla, Mohan Dunga, Anubhav Khandelwal
  • Publication number: 20190180823
    Abstract: Embodiments of the present disclosure generally relate to non-volatile memory devices, such as flash memory, and sensing operation methods including locking out high conduction current memory cells of the memory devices. In one embodiment, a method of sensing a plurality of memory cells in an array includes conducting a lower page read of one or more demarcation threshold voltages. Each memory cell is programmable to a threshold voltage corresponding to one of multiple memory states. A middle page read of one or more demarcation threshold voltages is conducted. Memory cells identified from the lower page read are selectively locked out during the middle page read. An upper page read of one or more demarcation threshold voltages is conducted. Memory cells identified from a prior page read are selectively locked out during the upper page read.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 13, 2019
    Inventors: Piyush DAK, Mohan Vamsi DUNGA, Pitamber SHUKLA
  • Patent number: 10025661
    Abstract: Technology is described herein for operating non-volatile storage. In one embodiment, the memory system tracks which adjustments to default values for hard bit read reference voltages are most frequently successful to decode data in non-volatile memory cells. In response to a process that uses only hard bits failing to successfully decode data in a group of the non-volatile memory cells, the memory system attempts to decode the data in the group of non-volatile memory cells using dynamic hard bit read reference voltages and dynamic soft bit read reference voltages that correspond to only a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages. By only using a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages time and power is saved.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: July 17, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Pitamber Shukla, Joanna Lai, Henry Chin, Deepak Raghu, Abhilash Kashyap
  • Publication number: 20180181462
    Abstract: Technology is described herein for operating non-volatile storage. In one embodiment, the memory system tracks which adjustments to default values for hard bit read reference voltages are most frequently successful to decode data in non-volatile memory cells. In response to a process that uses only hard bits failing to successfully decode data in a group of the non-volatile memory cells, the memory system attempts to decode the data in the group of non-volatile memory cells using dynamic hard bit read reference voltages and dynamic soft bit read reference voltages that correspond to only a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages. By only using a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages time and power is saved.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 28, 2018
    Applicant: SanDisk Technologies LLC
    Inventors: Pitamber Shukla, Joanna Lai, Henry Chin, Deepak Raghu, Abhilash Kashyap
  • Patent number: 9633738
    Abstract: A storage system includes a controller that is configured to make host data inaccessible. To do so, the controller may control power control circuitry to supply pulses to storage locations storing host data. The pulses may include flash write pulses but no erase pulses, or a combination of flash write pulses and erase pulses. If erase pulses are supplied, the number of the erase pulses may be less than the number supplied for performance of a default erase operation.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: April 25, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Zelei Guo, Pao-Ling Koh, Henry Chin, Pitamber Shukla, Deepak Raghu, Dana Lee
  • Patent number: 9552885
    Abstract: A non-volatile memory system mitigates the effects of open block reading by analyzing the un-programmed region of a block before programming to determine a potential for read disturbance. The system may determine a read count value associated with open block reading of the memory block and/or perform partial block erase verification. To mitigate the effects of open block read disturbance, the system performs partial block erase for the un-programmed region of the memory block and/or limits programming in the un-programmed region.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: January 24, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Pitamber Shukla, Henry Chin, Dana Lee, Cynthia Hsu
  • Publication number: 20160172045
    Abstract: A non-volatile memory system mitigates the effects of open block reading by analyzing the un-programmed region of a block before programming to determine a potential for read disturbance. The system may determine a read count value associated with open block reading of the memory block and/or perform partial block erase verification. To mitigate the effects of open block read disturbance, the system performs partial block erase for the un-programmed region of the memory block and/or limits programming in the un-programmed region.
    Type: Application
    Filed: July 8, 2015
    Publication date: June 16, 2016
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Pitamber Shukla, Henry Chin, Dana Lee, Cynthia Hsu