Patents by Inventor Piyanuch Somchit

Piyanuch Somchit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programmable logic device verification system and method
    Patent number: 6772381
    Abstract: A method and system for testing programmability of a programmable logic device (PLD) having a programmable AND array. The PLD is bulk programmed and verified. If the bulk programming fails, each row of cells of the AND array is programmed individually and the row-by-row programming of the PLD is verified.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: August 3, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Piyanuch Somchit, Precha Srisatuan, Lersak Nudach
  • Dynamic pulse width programming of programmable logic devices
    Patent number: 6560764
    Abstract: A novel method is provided for dynamically programming a programmable logic device (PLD). The method involves programming a required test pattern into the PLD using a programming pulse signal having the minimum pulse width. Then, the PLD programming is verified. If the PLD programming is found to be improper, the pulse width of the programming pulse signal is automatically adjusted to a normal pulse width greater than the minimum pulse width. Thereafter, the required test pattern is again programmed into the PLD using the programming pulse signal having the normal pulse width.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: May 6, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wasin Jaengbamrung, Piyanuch Somchit, Lersak Nudach, Thani Kritphantharak, Krissanawas Hiri-o