Patents by Inventor Piyush Sevalia

Piyush Sevalia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6526495
    Abstract: A circuit comprising a memory array and a control circuit. The memory array generally comprises a plurality of storage queues. Each of the storage queues may be configured to (i) receive and store an input data stream and (ii) present an output data stream. The storage queues may be configured to operate either (i) independently or (ii) in combination to store the input data streams, in response to one or more control signals. The control circuit may be configured to present the one or more control signals to control an operation of the plurality of storage queues. The control signals may be configured to control the configuration of the plurality of storage queues.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: February 25, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: Piyush Sevalia, Raymond Leong
  • Patent number: 6356122
    Abstract: A circuit comprising an oscillator, a reference path, and a feedback path. The oscillator may have a reference input receiving a reference signal, a feedback input receiving a feedback signal, and an output. The reference path may provide the reference signal from a reference clock input. The feedback path may provide the feedback signal from the oscillator loop output. At least one of the reference path and the feedback path comprises a programmable delay circuit.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: March 12, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventors: Piyush Sevalia, J. Ken Fox
  • Publication number: 20020008551
    Abstract: A circuit comprising an oscillator, a reference path, and a feedback path. The oscillator may have a reference input receiving a reference signal, a feedback input receiving a feedback signal, and an output. The reference path may provide the reference signal from a reference clock input. The feedback path may provide the feedback signal from the oscillator loop output. At least one of the reference path and the feedback path comprises a programmable delay circuit.
    Type: Application
    Filed: August 4, 1999
    Publication date: January 24, 2002
    Inventors: PIYUSH SEVALIA, J. KEN FOX
  • Patent number: 5691654
    Abstract: A method of limiting or translating the voltages of input signals, and of generating output signals such that the input's high state and low state differ by a different voltage than the output's high and low state. The present invention also teaches a system comprising a level translator circuit having level translators controlled by an operational amplifier or by a Zener diode that regulates the voltage level on one side of the translators, the other side of the translators being regulated by an external power supply. The operational amplifier or Zener diode, in some embodiments of the present invention, ensures that the second side of the level translators are limited to a given reference voltage. Often, a resistor is connected to the Zener diode or to the output of the operational amplifier, and in some embodiments a resistor-capacitor network removes higher-frequency components from the voltage supply.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: November 25, 1997
    Assignee: Cypress Semiconductor Corp.
    Inventors: Gary W. Green, Mathew R. Arcoleo, Piyush Sevalia