Abstract: Provided is a rapid over-the-air (OTA) production line test platform, including a device under test (DUT), an antenna array and two reflecting plates. The DUT has a beamforming function. The antenna array is arranged opposite to the DUT, and emits beams with beamforming. Two reflecting plates are disposed opposite to each other, and are arranged between the DUT and the antenna array. The beam OTA test of the DUT is carried out by propagation of the beams between the antenna array, the DUT and the two reflecting plates. Accordingly, the test time can be greatly shortened and the cost of test can be effectively reduced. In addition to the above-mentioned rapid OTA production line test platform, platforms for performing the OTA production line test by using horn antenna arrays together with bending waveguides and using a 3D elliptic curve are also provided.

Abstract: Hierarchical structured sparse parameter pruning and processing improves runtime performance and energy efficiency of neural networks. In contrast with conventional (non-structured) pruning which allows for any distribution of the non-zero values within a matrix that achieves the desired sparsity degree (e.g., 50%) and is consequently difficult to accelerate, structured hierarchical sparsity requires each multi-element unit at the coarsest granularity of the hierarchy to be pruned to the desired sparsity degree. The global desired sparsity degree is a function of the per-level sparsity degrees. Distribution of non-zero values within each multi-element unit is constrained according to the per-level sparsity degree at the particular level of the hierarchy. Each level of the hierarchy may be associated with a hardware (e.g., logic or circuit) structure that can be enabled or disabled according to the per-level sparsity.

Abstract: Provided is a testing method including: disposing a wafer on a working platform of a testing device; and moving a circuit board of the testing device relative to the working platform by a movement assembly of the testing device so as to allow at least two testing ports of the circuit board to test two chips of the wafer, respectively. Further, the two testing ports have different testing functions. Therefore, during the wafer testing process, a single testing device can perform multiple testing operations.

Abstract: A semiconductor arrangement includes a gate structure disposed between a first source/drain region and a second source/drain region and a first contact disposed over the first source/drain region. The semiconductor arrangement includes a second contact disposed over the second source/drain region and an airgap disposed between the first contact and the second contact and over the gate structure.

Abstract: A lipid-based nanoparticle (LNP) with high DL ratio and normalized release. The LNP of the present invention comprises an outer lipid monolayer encapsulating a plurality of lipid-active pharmaceutical ingredient (API)-ion complexes, wherein each lipid-API-ion complex comprises a complex of anionic lipid, API and ion wherein the API comprises a positively charged form of an API and wherein the outer lipid monolayer of the LNP comprises neutral lipids. The present invention further comprises a method of preparation of the LNP of the present invention.

Abstract: A lipid-based nanoparticle (LNP) with high DL ratio and normalized release. The LNP of the present invention comprises an outer lipid monolayer encapsulating a plurality of lipid-active pharmaceutical ingredient (API) complexes, wherein each lipid-API complex comprises a complex of anionic lipid and API wherein the API comprises a positively charged form of an API and wherein the outer lipid monolayer of the LNP comprises neutral lipids. The present invention further comprises a method of preparation of the LNP of the present invention.

Abstract: A semiconductor arrangement includes a gate structure disposed between a first source/drain region and a second source/drain region and a first contact disposed over the first source/drain region. The semiconductor arrangement includes a second contact disposed over the second source/drain region and an airgap disposed between the first contact and the second contact and over the gate structure.

Abstract: Accelerators are generally utilized to provide high performance and energy efficiency for tensor algorithms. Currently, an accelerator will be specifically designed around the fundamental properties of the tensor algorithm and shape it supports, and thus will exhibit sub-optimal performance when used for other tensor algorithms and shapes. The present disclosure provides a flexible accelerator for tensor workloads. The flexible accelerator can be a flexible tensor accelerator or a FPGA having a dynamically configurable inter-PE network supporting different tensor shapes and different tensor algorithms including at least a GEMM algorithm, a 2D CNN algorithm, and a 3D CNN algorithm, and/or having a flexible DPU in which a dot product length of its dot product sub-units is configurable based on a target compute throughput that is less than or equal to a maximum throughput of the flexible DPU.

Abstract: Accelerators are generally utilized to provide high performance and energy efficiency for tensor algorithms. Currently, an accelerator will be specifically designed around the fundamental properties of the tensor algorithm and shape it supports, and thus will exhibit sub-optimal performance when used for other tensor algorithms and shapes. The present disclosure provides a flexible accelerator for tensor workloads. The flexible accelerator can be a flexible tensor accelerator or a FPGA having a dynamically configurable inter-PE network supporting different tensor shapes and different tensor algorithms including at least a GEMM algorithm, a 2D CNN algorithm, and a 3D CNN algorithm, and/or having a flexible DPU in which a dot product length of its dot product sub-units is configurable based on a target compute throughput.

Abstract: Examples provide two-tiered scheduling within a cluster. A coarse-grained analysis is performed on a candidate set of hosts to select a host for a virtual computing instance based on optimization of at least one resource. A host is selected based on the analysis results. The identified virtual computing instance is placed on the selected host. A fine-grained analysis is performed on a set of communication graphs for a plurality of virtual computing instances to generate a set of penalty scores. A set of communicating virtual computing instances are selected based on the set of penalty scores. A first virtual computing instance from a first host is relocated to a second host to minimize a distance between the first virtual computing instance and a second virtual computing instance. Relocating the first virtual computing instance reduces at least one penalty score for the set of communicating virtual computing instances.

Abstract: A fabricating method of a shielded gate MOSFET is provided, includes the steps of forming a semiconductor substrate having a trench, forming a sacrifice oxide layer in the trench, the sacrifice oxide layer covering a side wall of the trench, forming a source polycrystalline silicon region in the trench, forming an insulation oxide layer above the source polycrystalline silicon region to have the source polycrystalline silicon region fully enclosed by the sacrifice oxide layer and the insulation oxide layer, depositing polycrystalline silicon into the trench and carrying out a back etching to control a thickness of the insulation oxide layer above the source polycrystalline silicon region, forming a gate oxide layer in the trench, the gate oxide layer covering the side wall of the trench, forming a gate polycrystalline silicon region in the trench, and forming a body layer and a heavily doped region around the trench in an ion implantation manner.

Abstract: A fabricating method of a shielded gate MOSFET is provided, including steps of: forming a semiconductor substrate having a trench; forming a sacrifice oxide layer in the trench, the sacrifice oxide layer covering a side wall of the trench; forming a source polycrystalline silicon region in the trench; forming an insulation oxide layer above the source polycrystalline silicon region to have the source polycrystalline silicon region fully enclosed by the sacrifice oxide layer and the insulation oxide layer; depositing polycrystalline silicon into the trench and carrying out a back etching to control a thickness of the insulation oxide layer above the source polycrystalline silicon region; forming a gate oxide layer in the trench, the gate oxide layer covering the side wall of the trench; forming a gate polycrystalline silicon region in the trench; and forming a body layer and a heavily doped region around the trench in an ion implantation manner.

Abstract: A projecting device is provided. The projecting device is adapted to assembling with an electronic device. The projecting device comprises a main body, a light emitting portion, a rotating portion, and an adjusting portion. The main body includes a first opening and a second opening. The light emitting portion is disposed in the main body, and transmits a light through the first opening. The rotating portion is disposed in the main body and connected with the light emitting portion. The adjusting portion is disposed in the second opening and connected with the rotating portion. The light emitting portion drives the rotating portion to rotate through the adjusting portion to adjust the angle of the light.

Abstract: Examples provide two-tiered scheduling within a cluster. A coarse-grained analysis is performed on a candidate set of hosts to select a host for a virtual computing instance based on optimization of at least one resource. A host is selected based on the analysis results. The identified virtual computing instance is placed on the selected host. A fine-grained analysis is performed on a set of communication graphs for a plurality of virtual computing instances to generate a set of penalty scores. A set of communicating virtual computing instances are selected based on the set of penalty scores. A first virtual computing instance from a first host is relocated to a second host to minimize a distance between the first virtual computing instance and a second virtual computing instance. Relocating the first virtual computing instance reduces at least one penalty score for the set of communicating virtual computing instances.

Abstract: Examples provide two-tiered scheduling within a cluster. A coarse-grained analysis is performed on a candidate set of hosts to select a host for a virtual computing instance based on optimization of at least one resource. A host is selected based on the analysis results. The identified virtual computing instance is placed on the selected host. A fine-grained analysis is performed on a set of communication graphs for a plurality of virtual computing instances to generate a set of penalty scores. A set of communicating virtual computing instances are selected based on the set of penalty scores. A first virtual computing instance from a first host is relocated to a second host to minimize a distance between the first virtual computing instance and a second virtual computing instance. Relocating the first virtual computing instance reduces at least one penalty score for the set of communicating virtual computing instances.

Abstract: A projecting device is provided. The projecting device is adapted to assembling with an electronic device. The projecting device comprises a main body, a light emitting portion, a rotating portion, and an adjusting portion. The main body includes a first opening and a second opening. The light emitting portion is disposed in the main body, and transmits a light through the first opening. The rotating portion is disposed in the main body and connected with the light emitting portion. The adjusting portion is disposed in the second opening and connected with the rotating portion. The light emitting portion drives the rotating portion to rotate through the adjusting portion to adjust the angle of the light.

Abstract: The present disclosure is related to a system and a system for displaying handwriting synchronously, and a handwriting device thereto. The handwriting device adopts a bistable display panel and includes a sensor circuitry that is used to record the handwriting contents over the panel. The sensor circuitry through the handwriting renders handwriting positions and pressure values. These sensed data is transmitted to a computer device instantly when the data of positions and pressure values are generated by the handwriting device. In the computer device, the handwriting can be synchronously displayed through a transformation from the received data to displaying positions and pressure values. Finally, in the computer device, a document recording the handwriting track over time is created. The document can be a picture, a video, or even a document with audio.

Abstract: An electronic writing apparatus is provided. The electronic writing apparatus includes a cholesteric liquid crystal writing tablet, a trace recording unit, a processing module and a transmission interface. The cholesteric liquid crystal writing tablet has a writing/display surface for receiving a writing pressure to display writing trace according to a motion path of the writing pressure. The trace recording unit is disposed on a side of the cholesteric liquid crystal writing tablet opposite to the writing/display surface for detecting a position coordinate of the writing pressure. The processing module is electrically connected to the trace recording unit, and the processing module receives and converts the position coordinate to a writing data corresponding to the writing trace. The transmission interface is electrically connected to the processing module, and the writing data is transmitted to and stored in a cloud computing system or an external electronic apparatus through the transmission interface.

Abstract: Examples provide two-tiered scheduling within a cluster. A coarse-grained analysis is performed on a candidate set of hosts to select a host for a virtual computing instance based on optimization of at least one resource. A host is selected based on the analysis results. The identified virtual computing instance is placed on the selected host. A fine-grained analysis is performed on a set of communication graphs for a plurality of virtual computing instances to generate a set of penalty scores. A set of communicating virtual computing instances are selected based on the set of penalty scores. A first virtual computing instance from a first host is relocated to a second host to minimize a distance between the first virtual computing instance and a second virtual computing instance. Relocating the first virtual computing instance reduces at least one penalty score for the set of communicating virtual computing instances.

Abstract: A data processing method includes generating statistical data according to data stored in a database; displaying a dialog window on a display screen, the dialog window including at least one block linked to at least one predetermined public address; and selecting the at least one block for uploading the statistical data to the at least one predetermined public address.