Patents by Inventor Po C. Huang

Po C. Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5056010
    Abstract: An apparatus and method for controlling direct memory access to the buffer memory located between the host system and the disk drive is disclosed. The direct memory access controller comprises a plurality of pointing means indicating buffer memory addresses accessed by the host and the disk. Based on these pointers, a port state solver and a transfer control device of the direct memory access controller can transfer byte data between the host and the buffer memory and sector data between the buffer memory and the disk device in accordance with a scheme of changing contents of the pointing means and reversing the host and the disk access activation signals with reference to relationship between associated pointers, and the size of error correction processed data. The direct memory access controller thus can efficiently transfer data without the intervention from the host with minimum hardware requirement.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: October 8, 1991
    Assignee: Industrial Technology Research Institute
    Inventor: Po C. Huang
  • Patent number: 5028922
    Abstract: A two-level multiplexed encoder/decoder based on a novel technique of code table compression is disclosed. By means of comparing various code conversion tables such as well-known tables for use in NRZ-MRM, NRZ-RLL conversion schemes, separate code word condition sets are obtained. In accordance with the code word condition sets thus obtained, a two-level multiplexed encode and decode logic can be easily constructed. The code word condition sets representing the compressed code relations are sensed in the first level and are used further to set up the operation of a connected network of a multiplexed logic circuit in the second level. The AM generation/check and precompensation circuit necessary for the encoder and decoder are incorporated as an integral part. This method is applicable when more than two code tables are needed to be integrated in a single encoder/decoder.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: July 2, 1991
    Assignee: Industrial Technology Research Institute
    Inventor: Po C. Huang