Patents by Inventor Po-Cheng Su

Po-Cheng Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12166128
    Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo, Po-Cheng Shih, Jun-Yi Ruan
  • Publication number: 20240395939
    Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo, Po-Cheng Shih, Jun-Yi Ruan
  • Publication number: 20240377972
    Abstract: A read voltage calibration method, a memory storage device, a memory control circuit unit are provided, including: reading, according to a first read command, a first physical unit based on a first read voltage level to obtain first data, and the first read voltage level is a default read voltage level corresponding to the first physical unit or a first voltage difference exists between the first read voltage level and the default read voltage level; decoding the first data to obtain first error bit information; reading, according to a second read command, the first physical unit based on a second read voltage level to obtain second data, and a second voltage difference exists between the second read voltage level and the default read voltage level; decoding the second data to obtain second error bit information; calibrating the default read voltage level according to the first and second error bit information.
    Type: Application
    Filed: June 16, 2023
    Publication date: November 14, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Szu-Wei Chen, Yu-Hung Lin, I-Sung Huang, Po-Cheng Su
  • Publication number: 20240304259
    Abstract: A voltage prediction method, a memory storage device and a memory control circuit unit are disclosed. The method includes: reading a plurality of memory cells in a rewritable non-volatile memory module by using a first read voltage level to obtain count information, and the first read voltage level is configured to distinguish a first state and a second state adjacent to each other in a threshold voltage distribution of the memory cells, and the count information reflects a total number of first memory cells meeting a target condition among the memory cells; and predicting a second read voltage level according to the count information, and the second read voltage level is configured to distinguish a third state and a fourth state adjacent to each other in the threshold voltage distribution.
    Type: Application
    Filed: April 10, 2023
    Publication date: September 12, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Po-Cheng Su, Po-Hao Chen, Yu-Cheng Hsu, Wei Lin
  • Publication number: 20240304235
    Abstract: A voltage calibration method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: reading first data from a first physical unit using a first read voltage level and reading second data from at least one second physical unit using a second read voltage level; obtaining count information reflecting a total number of memory cells meeting a default condition in the first physical unit and the at least one second physical unit according to the first data and the second data; and calibrating the first read voltage level according to the count information.
    Type: Application
    Filed: April 17, 2023
    Publication date: September 12, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Po-Hao Chen, Po-Cheng Su, Shih-Jia Zeng, Yu-Cheng Hsu, Wei Lin
  • Publication number: 20240201857
    Abstract: A decoding method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending at least one read command sequence instructing to read a first physical unit in a rewritable non-volatile memory module; receiving response data from the rewritable non-volatile memory module, wherein the response data includes a plurality of identification bits, and the plurality of identification bits reflect a voltage variation of a first bit line where a first memory cell in the first physical unit is located during a discharge process; determining a decoding parameter corresponding to the first memory cell according to the plurality of identification bits; and decoding data read from the first memory cell according to the decoding parameter.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 20, 2024
    Applicant: Phison Electronics Corp.
    Inventors: Po-Cheng Su, Yu-Cheng Hsu, Wei Lin
  • Patent number: 11829644
    Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: receiving a read command from a host system; in response to a first physical erasing unit being a first type physical unit, sending a first operation command sequence to instruct a rewritable non-volatile memory module to read a first physical programming unit based on a first electronic configuration; and in response to the first physical erasing unit being a second type physical unit, sending a second operation command sequence to instruct the rewritable non-volatile memory module to read the first physical programming unit based on a second electronic configuration. The first electronic configuration is different from the second electronic configuration.
    Type: Grant
    Filed: January 22, 2022
    Date of Patent: November 28, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Po-Cheng Su, Chih-Wei Wang, Yu-Cheng Hsu, Wei Lin
  • Patent number: 11797222
    Abstract: A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first physical unit group; scanning at least one first physical programming unit in a currently read physical erasing unit in response to determining the first read account is greater than a first read count threshold to obtain a first error bit amount; scanning all physical programming units in at least one first physical erasing unit in the first physical unit group in response to determining the second read account is greater than a second read count threshold to obtain a second error bit amount; performing a read disturb prevention operation according to the first or second error bit amount.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: October 24, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Shih-Jia Zeng, Po-Cheng Su, Chih-Wei Wang, Wei Lin
  • Publication number: 20230195361
    Abstract: A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first physical unit group; scanning at least one first physical programming unit in a currently read physical erasing unit in response to determining the first read account is greater than a first read count threshold to obtain a first error bit amount; scanning all physical programming units in at least one first physical erasing unit in the first physical unit group in response to determining the second read account is greater than a second read count threshold to obtain a second error bit amount; performing a read disturb prevention operation according to the first or second error bit amount.
    Type: Application
    Filed: January 17, 2022
    Publication date: June 22, 2023
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Shih-Jia Zeng, Po-Cheng Su, Chih-Wei Wang, Wei Lin
  • Publication number: 20230176783
    Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: receiving a read command from a host system; in response to a first physical erasing unit being a first type physical unit, sending a first operation command sequence to instruct a rewritable non-volatile memory module to read a first physical programming unit based on a first electronic configuration; and in response to the first physical erasing unit being a second type physical unit, sending a second operation command sequence to instruct the rewritable non-volatile memory module to read the first physical programming unit based on a second electronic configuration. The first electronic configuration is different from the second electronic configuration.
    Type: Application
    Filed: January 22, 2022
    Publication date: June 8, 2023
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Po-Cheng Su, Chih-Wei Wang, Yu-Cheng Hsu, Wei Lin
  • Patent number: 10533847
    Abstract: An inspection mechanism for metal blank, adapted for sensing the surface condition of a metal blank, includes a framework, a holding device, a shuffling device, and an inductive control device. It mainly utilizes the inductive control device to drive the holding device to hold and position the metal blank and control the shuffling device to move the sensor of the inductive control device to the path of sensing the metal blank, so as to conduct the sensing operation.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: January 14, 2020
    Assignee: FACTORY AUTOMATION TECHNOLOGY CO., LTD.
    Inventors: Po Cheng Su, Hsin Hong Hou, Kuo Hsiu Chen, Shun Yu Yang
  • Patent number: 10131000
    Abstract: An object burr processing machine for trimming object burr, comprises a machine base, a positioning seat erected on the machine base, a processing arm provided on the positioning seat, an object stage coupled with the machine base for placing object, and control device. The control device comprises an object sensing unit, a processing path setting unit, and a process control unit. The object sensing unit is able to sense the shape of the object. The processing path setting unit is able to define a processing path based on the shape of the object. The process control unit communicates and links to the processing arm, the object stage, the object sensing unit, and the processing path setting unit. During the burr trimming process, the process control unit can use the established processing path to control other devices to conduct the burr trimming process to the object, which greatly increases the convenience and efficiency of the processing.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: November 20, 2018
    Assignee: FACTORY AUTOMATION TECHNOLOGY CO., LTD.
    Inventors: Po Cheng Su, Chen Hsiang Lin, Hsin Hong Hou
  • Publication number: 20180259325
    Abstract: An inspection mechanism for metal blank, adapted for sensing the surface condition of a metal blank, includes a framework, a holding device, a shuffling device, and an inductive control device. It mainly utilizes the inductive control device to drive the holding device to hold and position the metal blank and control the shuffling device to move the sensor of the inductive control device to the path of sensing the metal blank, so as to conduct the sensing operation.
    Type: Application
    Filed: March 8, 2018
    Publication date: September 13, 2018
    Inventors: PO CHENG SU, Hsin Hong Hou, Kuo Hsiu Chen, Shun Yu Yang
  • Patent number: 10032568
    Abstract: A photosensitive organic dye is adapted to be used in a photoelectric converting device such as a dye-sensitized solar cell. The photosensitive organic dye having a structural formula (I): where, Aryl1 represents substituted or unsubstituted aryl with one or more aromatic rings, NR2R3 represents a substituted electron-donating group, wherein N represents a nitrogen atom, and R2 and R3 independently represent identical or different substituted or unsubstituted hydrocarbon groups, L represents an optional linker unit, and A represents an electron-withdrawing group.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: July 24, 2018
    Assignee: NATIONAL CHUNG HSING UNIVERSITY
    Inventors: Chen-Yu Yeh, Po-Cheng Su, Chia-Wei Hsu, Chi-Lun Mai
  • Publication number: 20170323213
    Abstract: A digital marking processing apparatus includes a central control unit, and a processing quality prediction unit, a processing unit and a marking unit which are respectively connected with the central control unit electrically. The processing quality prediction unit can implement a virtual processing quality prediction method to predict the processing quality of the workpiece, output an accurate data of quality to the central control unit and generate tool path for the processing unit to process the workpiece. The central control unit is able to compile the data of quality from the processing quality in prediction unit into file information, so that the marking unit can then utilize the file information to correspondingly mark barcode or other digital pattern on the workpiece, which facilitate workpiece management and information disclosure.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 9, 2017
    Inventors: PO CHENG SU, Hsin Hong Hou, Fan Tien Cheng, Haw Ching Yang, Hao Tieng
  • Publication number: 20170322537
    Abstract: A processing apparatus with vision-based measurement includes a central control unit and a workpiece transporting unit, a vision-based measurement unit, a processing quality prediction unit, and a processing unit that are respectively connected to the central control unit electrically. The workpiece transporting unit is controlled by the central control unit to transport the workpiece to the vision-based measurement unit to be measured. The data obtained by the vision-based measurement unit from measuring the workpiece is provided to the processing quality prediction unit for conducting quality prediction. The processing quality prediction unit implements a virtual processing quality prediction method to establish a quality prediction model, wherein the workpiece transporting unit is utilized to assist the processes of establishing or modifying the model.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 9, 2017
    Inventors: PO CHENG SU, Hsin Hong Hou, Fan Tien Cheng, Haw Ching Yang, Hao Tieng
  • Publication number: 20170322186
    Abstract: A processing apparatus includes a processing quality prediction unit capable of outputting workpiece surface processing signal, a storage unit capable of storing workpiece surface processing signal, and a workpiece surface information management unit capable of interpreting workpiece surface processing signal. The workpiece surface information management unit can convert the surface processing signal into data of workpiece surface quality. The workpiece surface information management unit can be utilized to respectively interpret the surface processing signals provided by the processing quality prediction unit and to convert them into data of the roughness degree of the workpiece surface texture, so as to clearly provide information regarding the quality of the workpiece surface and completely utilize the signals detected during the processing for increasing the value added of the processing apparatus and enhancing the efficiency of use of the processing apparatus.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 9, 2017
    Inventors: PO CHENG SU, Hsin Hong Hou, Fan Tien Cheng, Haw Ching Yang, Hao Tieng
  • Publication number: 20170322547
    Abstract: A processing apparatus includes a central control unit, and a processing quality prediction unit, a processing unit, and a tool compensation unit which are respectively connected with the central control unit electrically. The processing quality prediction unit implements a virtual processing quality prediction method to predict the processing quality of the workpiece, output an accurate data of quality to the central control unit, and generate tool path for the processing unit to process the workpiece. The central control unit judges the data from the processing quality prediction unit and outputs the data to the tool compensation unit to calculate tool compensation data. The tool compensation unit provides the tool compensation data to the processing quality prediction unit to form a new processing path. Then the processing unit implements the compensated processing path to process the workpiece.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 9, 2017
    Inventors: PO CHENG SU, Hsin Hong Hou, Fan Tien Cheng, Haw Ching Yang, Hao Tieng
  • Publication number: 20170322549
    Abstract: A processing apparatus includes a processing unit for processing the workpiece, a processing quality prediction unit connected with the processing unit electrically, a signal interpretation unit connected with the processing quality prediction unit electrically, and a control unit connected with both the processing unit and the signal interpretation unit electrically, wherein when the processing unit is processing the workpiece, the processing quality prediction unit detects the processing signal and sends the signal to the signal interpretation unit, wherein when the signal interpretation unit interprets the processing signal, if there is abnormality in the processing signal, the signal interpretation unit will immediately notify the control unit to stop the processing unit from operating.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 9, 2017
    Inventors: Po Cheng SU, Hsin Hong Hou, Fan Tien Cheng, Haw Ching Yang, Hao Tieng
  • Publication number: 20170129023
    Abstract: An object burr processing machine for trimming object burr, comprises a machine base, a positioning seat erected on the machine base, a processing arm provided on the positioning seat, an object stage coupled with the machine base for placing object, and control device. The control device comprises an object sensing unit, a processing path setting unit, and a process control unit. The object sensing unit is able to sense the shape of the object. The processing path setting unit is able to define a processing path based on the shape of the object. The process control unit communicates and links to the processing arm, the object stage, the object sensing unit, and the processing path setting unit. During the burr trimming process, the process control unit can use the established processing path to control other devices to conduct the burr trimming process to the object, which greatly increases the convenience and efficiency of the processing.
    Type: Application
    Filed: November 4, 2016
    Publication date: May 11, 2017
    Inventors: PO CHENG SU, CHEN HSIANG LIN, HSIN HONG HOU