Patents by Inventor Po-chiang Albert Lee

Po-chiang Albert Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Graphical user interface for prototyping early instance density
    Patent number: 7810063
    Abstract: According to various embodiments of the invention electronic circuit design information can be presented to a designer by determining an electronic circuit comprising at least two gates and by determining a distance of one gate relative to another gate in a stage. A visual indicator for the stage can be calculated based on the distances between at least two gates in the stage. The visual indicator can then be displayed. The visual indicator can be a color and the relative distance can be indicated by brightness, hue or saturation, etc. Alternatively, the visual indicator can be a pattern and the relative distance between at least two gates can be indicated by darkness of the pattern.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: October 5, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Harsh Dev Sharma, Po-chiang Albert Lee, Rajeev Srivastava, Srinivas R. Kommoori, Bharat Bhushan, Mithunjoy Parui